I am using PMOS as a switch to control 24V to deliver to load. When MCU drives the NMOS it is suppose to pull the PMOS gate to GND and turn-on so that load can get the 24V. This is what expected as per circuit 1.
However, PMOS has VGS max rating of 20V so circuit 1 can damage the PMOS when it is ON. so to protect the PMOS from exceeding VGS rating on internet I came across 2 methods. That I have given in image as circuit 2 and circuit 3.
Circuit 2 uses voltage divider, when the PMOS is on, to ensure VGS is just 4V (24 V - 19 V) and stays within limit.
Circuit 3 uses zener of 15V to clamp voltage to 15V across VGS.
Just unable to understand if circuit 2 works then why would anyone go with circuit 3 and additional zener on board.
Thanks in advance.