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While looking at a datasheet about an NXP ARM CPU, I saw that the DRAM controller could support this

Memory types: LPDDR4

• Two channels of 32-bit memory:

• LPDDR4 up to 1.6 GHz

When it says two channels of 32-bit memory, does that mean that it has a maximum of 32-bit memory addresses? So in that case, it could support 2 channels of a maximum of 4 GB of LPDDR4 DRAM?

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It means that it has two 32 bit memory controller channels, so 64 bits in total.

This is not related to the size of the physical address space, which is probably larger than 32 bits on a device with LPDDR4 support.

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32-bit memory is memory with 32 data lines, so any read or write is done on 32 bits at a time.

This is independent of the number of address lines, though the combination of address and data lines will give the total capacity of a chip.

Each address will give access to a 32-bit word, also known as a 4-byte word.

So if the memory chip has 30 address lines for instance, that means about 1 billion different addresses (words), and since there are 4 bytes per address that would be 4 billion bytes (4 GiB).

The information you have given does not say how many address lines are available, so it’s not possible to infer the maximum addressable RAM.

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