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I'm designing a battery-powered product with a USB-C PD charging port and a single user button. I'd like to be able to build in a feature for recovery and re-programming where the user holds down the user button while plugging in the charger, resulting in a reset signal to the MCU. In this way, regardless of the MCU state, the user can recover the product through reset (and if the user button continues to be held, via recovery mode in the bootloader).

The electrical engineering problem is then to implement a negative pulse on MCU_RST ("R") on a rising edge of V_BUS ("P"), but only when the user button USR_B ("B") is held. Here I've assumed V_BUS ~ 5--20 VDC, USR_B is active-low, and a 3.3V supply is always available from the battery.

I'd like a critique of a solution I propose, and/or an alternative solution.

My solution involves:

  1. Using an RC network to generate a delayed version ("D") of the V_BUS signal.
  2. I analyzed the required boolean expression as R = ~(P && ~D && B).
  3. I understood an N-channel mosfet to implement the equation C = A && ~B as shown below.
  4. I then reworked my expression for R to be in the form of nested versions of the N-mos equation.
  5. I then wrote down the corresponding schematic.

At this point, I would proceed with simulation of the circuit to check my assumptions. But I may still be missing something, or missing a much simpler way to meet the requirement.

schematic with three mosfets

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A basic simulation shows that this circuit should work as intended. I chose some values for the various components, and found that we can expect a RST low time between 8 and 50 ms, depending on whether V_BUS is 5V or 20V.

schematic

voltage traces

One risk is that, if V_BUS gradually transitions from 0 to 5V, the transition may be missed, as the RC time constant is too small relative to the transition time.

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