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enter image description here

That's schematic of half adder using only NOR gates.

Why aren'y inverters used?

In the picture, there are 2 NOR gates where the two inputs are same as A or B.

Why don't we replace these with a NOT gate? Is it because their oparations are the same as an inverter and a NOR gate needs 2 CMOS, but an inverter needs a CMOS?

Are there any problem in fabrication or entire operations to replace those?

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    \$\begingroup\$ Conceptually, yes, you could replace the 2 NOR gate you mentioned with NOT gates. In practice, it depends on what you're trying to achieve when it comes to the way you implement the half adder. \$\endgroup\$
    – uriyabsc
    Commented Jun 18, 2023 at 6:33
  • \$\begingroup\$ Designing a CMOS layout, don't forget "pass gate style". For bigger adders, two-bit full adders offer the opportunity to use an "inverted internal carry". \$\endgroup\$
    – greybeard
    Commented Jun 18, 2023 at 8:15
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    \$\begingroup\$ If this schematic is specifically drawn to be a half added using only NOR gates, that would be the reason why it uses only NOR gates. I.e. to demonstrate that it is possible to realize any combinatorial circuit from NOR only. \$\endgroup\$
    – jpa
    Commented Jun 18, 2023 at 14:57
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    \$\begingroup\$ Like you said, "That's schematic of half adder using only NOR gates." If it included inverters, that wouldn't hold. \$\endgroup\$
    – ilkkachu
    Commented Jun 18, 2023 at 15:26
  • \$\begingroup\$ Oh, what i'd like to say is - If in the Half adder only made of NOR gates, That 2 NOR gates are replaced by 2 Inverters, then the circuit have same operation as before circuit? I'm sorry for my ridiculous english writing.. \$\endgroup\$ Commented Jun 20, 2023 at 16:50

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Yes, you could replace those two NOR gates with inverters.

You could use inverters from a 74HC04, and NOR gates from a 74HC02, for example. But you may want to use only 74HC02 packages, for some reason. Their behaviour would be identical, except for a slight change in propagation delay.

If you were implementing this adder unit with MOSFETs in an IC, it's certainly easier to implement inverters than two-input NOR gates with their inputs joined, so from that perspective inverters make more sense.

Otherwise, if you have a bunch of unused NOR gates, then it makes sense to employ them, since they're already there. Likewise, if you had some unused NAND gates, you could use them in the same way, with joined inputs, to form an inverter.

Everything depends on what you have available, and what is easier to implement. Also, if speed is an issue, then there's a tiny change you can make to gain perhaps a nanosecond:

schematic

simulate this circuit – Schematic created using CircuitLab

By tying one of the NOR inputs (G2 and G3) to logic low (ground, 0V), you still have an inverter, so logical behaviour has not changed. However, because the sources of signals A and B are driving one fewer gate inputs (two instead of three), they have less capacitance to drive, and will transition between logic states slightly more quickly.

If you have some spare NAND gates, from a 74HC00 for instance, here's how you might use them in place of G2 and G3, and still have exactly the same logical behaviour:

schematic

simulate this circuit

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  • \$\begingroup\$ Thanks a lot! I`m designing layouts of Full adder for high speed operation by using CMOS. Then propagation delay must be something critical..! \$\endgroup\$ Commented Jun 18, 2023 at 7:09

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