On the new generation of ATmega and ATtiny (for example, the ATmega3208), there is only one timer/counter (TCA) with more than one compare channel. All the others (TCB0, TCB1, TCB2, ...) lack the multiple compare channels earlier generations of Atmel processors had (which had 2 compare channels on every timer/counter)
Still, the TCB can be used to generate a PWM signal. It has a dedicated PWM mode. However, I could not find any good way of stopping the PWM cleanly, as this timer/counter does not have a possibility to raise an interrupt except on an overflow.
On earlier generation Atmel processors, there were two compare channels: A and B. The PWM worked by using one of them to define the duty cycle and the other to define the period. Both could generate interrupts. So in order to use the PWM as a signal generator (for example, a servo controller, or for a custom communication protocol) I could use the compare channel of the duty cycle to prepare the new times for the next cycle. And if I wanted to stop the PWM signal, I could still use the compare channel of the duty cycle to stop the timer, as there would be plenty of time until it would start again. This way I could also use arbitrarily short pulses and change the duty cycle at B, because there was plenty of time for it to take effect until the cycle restarted at the next A.
So, if I wanted to stop the PWM, I could just do so in the "compare B interrupt".
However, the new generation of AVR8X processors only have one single interrupt set condition: on overflow. This means if I stop the timer in the interrupt, the output was already set to high before the interrupt can start executing, so I will have an unwanted spike at the end:
Is there any way to avoid this? For a timer/counter used for signal generation, there would be a much higher need for an interrupt source on a compare event instead of an overflow event, so I have no clue what went on in the minds of the designers when they provided an interrupt solely for the overflow event.
I tried fumbling with the event system, without any success. For now it seems the only way to cleanly stop a PWM signal is to use a secondary timer/counter which is set to somewhere between the duty cycle and the period of my PWM signal, which I start on the beginning of my last impulse in order for it to stop my PWM generator. But this way I waste an entire different timer/counter just in order to use the PWM generator which the TCB was allegedly also designed to support!
(and the lack of a compare interrupt on the duty cycle prevents me from using short pulses in a signal generator, as I won't have the time to set the new values if I can only interact with the signal in the overflow interrupt)
A possible solution would be to change the timer from PWM to single-shot on the beginning of the last pulse, but this would make the last pulse less accurate, as I'll have to set the new countdown inside the interrupt.