Murata has a nice website for this:
Then you can plot ESR, ESL, Z, etc versus frequency, loss of capacitance of your MLCCs versus applied DC voltage, etc.
A ceramic cap isn't very useful unless it's soldered on a board, and then the total inductance must include vias or other copper in the circuit. So the number from the manufacturer says something, but it's not the whole story.
Regarding inductance, MLCCs are pretty simple, they're a stack of plates in a tiny box so they'll have the same inductance as a chunk of metal the same size as the capacitor soldered on the board in the same place. So it pretty much depends only on package.
For example the "reverse geometry" caps with the contacts on the long end have lower inductance because of the shape. But that won't reduce the inductance of your vias, and it's the same as putting two smaller "normal" caps next to each other while being more expensive.
If the cap that has half the inductance (mounted) is three times as expensive as the jellybean cap, just put two jellybean caps in parallel.
Now think about a row of caps on your PCB, look at it from above the board and stick a "+" where the current goes up in a via and a "-" where it goes down the via into the board. A neat row of caps will look like this:
Some clever caps like X2Y or the IDC ones you put in your screenshot reduce the inductance of your vias, by letting you arrange the vias in a criss cross pattern where the direction of current alternates:
So the magnetic fields from these loops cancel and that reduces the total inductance including the vias. It's pretty neat.