Electrical/physical difference between Primary Memory and Secondary Memory connection to CPU

Question

It is said that the difference between primary memory and secondary memory is that primary memory is "directly accessible by CPU", while secondary memory is "not directly accessible by CPU".

Examples:

https://www.geeksforgeeks.org/introduction-of-secondary-memory/

Primary memory is directly accessed by the Central Processing Unit(CPU).

Secondary memory is not accessed directly by the Central Processing Unit(CPU). Instead, data accessed from a secondary memory is first loaded into Random Access Memory(RAM) and is then sent to the Processing Unit.

https://cs.stackexchange.com/questions/134864/is-rom-primary-memory-or-secondary-memory

The distinction between primary and secondary storage relies on several joint characteristics which the prototypical examples – RAM and hard drives – satisfy:

• Primary storage can be accessed directly by the CPU. Access is fast. Data is volatile – it is lost when power is turned off.
• Secondary storage cannot be accessed directly by the CPU. Access is slow. Data is non-volatile – it is retained even when power is turned off.

https://stackoverflow.com/questions/12705745/what-is-the-difference-between-physical-main-secondary-primary-memory

Primary storage (also main memory and physical memory) are generally used interchangeably to refer to the memory that is attached directly to the processor.

Secondary storage is storage that is not directly connected to the CPU. The most common case of secondary storage is the hard disk.

But why? What prevents the CPU from directly accessing the secondary memory and what allows it to access the primary memory directly? How is the physical wiring of primary memory to CPU different from that of the secondary memory?

I want a physical layer / circuit-level answer please. Thanks.

Answer 1

Primary memory, e.g. RAM is directly connected to a bus coming out of the CPU. In the simplest form, the CPU reads RAM by putting an address out on the bus and then reading back the corresponding data. The more common forms involve reading bursts of location from SDRAM, using a hardware module called a memory controller.. Also, because RAM is generally slower than the CPU, a memory cashe is used as a buffer between the CPU and RAM.

The reason that generally CPUs cannot directly read secondary memory directly is that the secondary memory (e. g. disk drives) are orders of magnitude slower than the CPU and making the CPU wait for data from secondary memory would be incredibly wasteful. Also, the interface to secondary memory is generally more complex (e. g. SPI or USB connections) which require low-level processes that are better implemented external to the CPU. Instead, a DMA (Direct Memory Access) module is programmed by the CPU to read secondary memory into primary memory and then signal (interrupt) the CPU when completed.

Having said that, these are rare cases where the CPU directly reads secondary memory. Some microcontrollers have hardware support for fetching instructions and running code directly from SPI Flash chips. This is used almost only for initially booting the system since it severely throttles the CPU. Also, it is possible for the the CPU code running in a loop reading byte from disk drives; this is called Programmed I/O and is extremely inefficient so is very rarely used. A slightly more efficient but still rarely used method is where the CPU sets up a secondary memory transfer and them is interrupted by the bus controller when each byte or word is ready.

Memory controllers, DMA modules and secondary memory controllers are (generally) hardware state machines that manage the data transfers independent of the main CPU(s). These may be integrated together with the CPU module in a single chip or may be in chips external to the CPU.

Answer 2

What prevents the CPU from directly accessing the secondary memory and what allows it to access the primary memory directly? How is the physical wiring of primary memory to CPU different from that of the secondary memory?

It's about convenience and practicality.

Primary

The CPU instruction set contains instructions that access memory directly like "load contents of address X into register R". When it executes such instructions it will output the address to be read on its address bus along with signals that tell the memory chips that a read is occuring. The memory chips respond by outputting the data at this address on the data bus, which the CPU can then read.

Practical implementations usually have a bit more complexity like address decoding (figuring out which memory chip(s) are concerned by the address currently on the bus), wait states to handle some memories being slower than the CPU, etc. The "memory chip" can be integrated into the physical chip that also contains the CPU, for example a microcontroller usually has on-chip RAM, ROM and NOR flash.

But overall, the important things are:

• Every word has its own address and is individually accessible
• Access is blocking
• This is a simple, fast, 100% hardware process. Primary memory and CPU communicate with very simple interfaces: buses for address and data, and a bunch of signal wires for read, write, etc. And the de

On the opposite end, secondary memory like a harddisk is accessed through a controller, and data words on these memories donot have an address that is directly accessible via the address bus: the CPU first has to tell the disk controller to access a sector and copy it into RAM, then it can read it. It's the same thing for writes, the CPU first builds a complete sector to write, and then gives an order to the disk controller.

Secondary

Now I guess you're asking why is it like that? Again, convenience, practicality, and historical reasons. So, on secondary memory:

• Every word does not have its own address on the address bus

Back in the day before 64 bit cpus, people with 16 bit CPUs wanted harddisks (or tapes) to hold more data that the CPU could access with only 16 bits of address. I mean the whole point of this kind of storage is to hold a lot of data. So the "address" of the data to be read can't be communicated via the address bus, which doesn't have enough bits. Instead it has to be communicated to the controller, for example by writing into its hardware registers.

In theory it would be possible to use a disk as primary memory if the controller supported direct access via the memory but, but...

• Access is not blocking

When the CPU does a memory access via its bus, it blocks while waiting for the result: the CPU can't execute the next instruction until it has been read. Primary memory is supposed to be very fast, so this is not a problem. However, spinning disks are very slow and with huge latency. So it makes sense to delegate disk tasks to a controller: in a multitasking OS, when a process needs to read from disk, the OS orders the disk controller to do the operation, then puts that process on hold and executes other processes while the disk is working. When the data is ready, the disk controller signals the CPU via an interrupt, and the OS wakes up the process that was waiting for the data.

So even if, in theory it would be possible to use a disk as primary memory if the controller supported direct access via the memory but, no one would do it... because it is much better to delegate to a controller to free up the CPU to do other stuff while it is waiting.

• This is a complicated process involving software.

Due to the above, and secondary memory access being slow, you actually want it to go through software so the OS can handle things and execute other processes during the wait time.

The species problem

The quintessential primary memories are SRAM and the ROM/Flash types that support individual word access.

Some memory types are a bit "in between".

SDRAM and Flash have some properties similar to harddisks: data is organized in pages (just like disk sectors) ; there's no clear data/address bus but instead a protocol has to be used to access data ; there is latency to access a page ; burst access of consecutive addresses is much faster than random access. For Flash, writes usually need special care, like erasing and writing a whole page.

However, we need lots of fast RAM, so for these special cases, a pure hardware controller is justified. This controller makes these types of memories primary because it sits on the CPU's bus and allows direct access by memory address.

Likewise some microcontrollers use SPI flash as a primary memory via a controller that allows direct access by memory address, and translates that into SPI commands.

The funny thing is, if you take the exact same chips and put them into a SSD, then they'd be secondary memory because they're no longer accessible by memory address, but via a protocol like SATA.

Unless of course the protocol is PCI-Express, in which case some parts of the device's onboard memory may be memory-mapped and accessible by direct access!

Going back to the microcontroller executing code from SPI flash: when it does that, via a hardware controller, Flash is accessed by address so it is primary. But these controllers don't handle writes: that's done via software emitting SPI commands. So this type of SPI flash is a primary memory for reads, but a secondary memory for writes...

Answer 3

What prevents the CPU from directly accessing the secondary memory and what allows it to access the primary memory directly?

In addition to the slowness factor mentioned in this answer, a limiting factor is direct addressability by the CPU. Secondary memory is usually very large when compared to RAM, so it not possible to fit their addresses into a 32 bit or 64 bit register.