Must the characteristic cable impedance match the series output impedance?

Question

I have been working on a communication link between an FPGA and a SPI slave. The electrical connection between the two is done via a 2 metre cable composed of 42AWG wires with the following characteristics, as shown in the datasheet:

• Conductor: 7/0.025 (<-What does this mean?) Silver copper alloy
• Insulation: PFA 0.19 diameter
• Wire resistance 7000 MAX (<-what does this mean?)
• Characteristic impedance: 50 ohm

Looking at an old coworker's notes, the capacitance per meter found is 110pF/m.

In order to measure the impact of the cable's length on the SPI link, I created a RLC model (see figure 1.) Since the characteristic impedance of the cable is 50 ohm, I inserted a 50 ohm resistor at the output of the FPGA.

I ran some simulations and noticed some reflections on the signal (the normal, I guess.) Out of curiousity, I re-ran the simulation with a 100 ohm output resistor and it improved the quality of the pulsed signal. See the following figures for reference.

• 50 Ohm simulation

• 100 Ohm simulation

Now going to the question (as the title says):

Must the output impedance match the cable's characteristic impedance? If not, how do I determine/approximate the right value?

Answer 1

No, the output impedance does not really need to match the cable characteristic impedance, but if it does, then any reflections from the receiving end will not reflect back. It's usually more important to terminate the receiving end of the cable correctly, so that there will be no reflections back to source to begin with.

That said, any series resistance between output and cable will help as it limits slew rate and bandwidth, even as first order approximation of cable having capacitance.

But, if you are simply connecting an SPI bus between FPGA and another chip by just using logic levels over a 2 meter cable and some series resistors, generally that may not be a good idea as it's not that simple.

SPI bus is generally not intended for extending it via long cables, but for very short communications on same PCB or at most inside PCBs inside same casing.

Depends of course what is the exact cable type, what is the communication speed, and how much noise and reflections the chips can handle - expect poor performance unless the chips have built-in hysteresis or at least decent bus drivers.

SPI is not a "link" that can directly be extended for 2 meters.

Answer 2

The output impedance essentially does two things: It slows down the edge rate of the transmitted signal. And it presents an impedance for incoming waves. The incoming wave might just be the transmitted wave two transit times later, because of a reflection at the end of the cable.

Usually the first approach is to slow down the edge rates enough, so you can completely disregard any transmission line effects. The actual value necessary to achieve that has nothing to do with the cable impedance (at least not directly). So it may very well be the case that a 100 Ohm (or even bigger) source resistance into a 50 Ohm transmission line will do that for you and solve your problems.

Sometimes you don't get away with slowing down your edge rates, because your link will stop working. In this case you have to choose a termination scheme so your signal integrity is not jeopardized. If your termination scheme of choice is "source termination", then you indeed need a source impedance that matches the impedance of the transmission medium.

If you are simulating this stuff in order to get a better understanding of transmission line effects, I would also suggest to use the "tline" circuit element of LTspice. The tline circuit element adds the one fundamental difference of transmission lines compared to lumped element RLC circuits: Time Delay.