choosing a PCB stackup and determining an appropriate approach to component placement can be a challenging decision. I would like to offer you some advice based on my experience.
You need to select a stack-up for your PCB. There are various options available, each with its own unique advantages. However, it's important to note that these advantages may come at a cost. Here are
some options listed in ascending order of cost:
- Only Through-Vias from 1-4
- Blind-Vias from 1-2, 3-4 and Through-Vias from 1-4
- Blind-Vias from 1-2, 3-4 and Buried-Vias from 2-3
Depending on the complexity of your layout, I would recommend designing for Option (1) as it is the most
cost-effective and easily producible.
If this project is for a hobbyist endeavor, cost considerations become significant, and opting for cheaper
PCB manufacturing services can be advantageous.
I also suggest selecting a manufacturer before commencing the design process. This allows you to
consult their specifications regarding track size, spacing, drill diameter, restring, and other relevant parameters.
Best practice dictates, that the
crystals should be placed on
the same side as the component they are intended for. By doing so, the CLK signals can avoid the need for vias. This approach helps prevent issues related to signal integrity, EMI emissions, and other potential problems.
When utilizing a
through-vias only 4-layer PCB, I often employ the following stack-up:
This arrangement provides
capacitance between the GND and 3V3 layers, which helps mitigate EMI issues. Additionally, since only through-vias are used, there are no significant drawbacks in achieving a compact layout.
Please see: Circuit Board 4-Layer PCB Stackup Planning, Cadence or Advantages of 4 Layer PCB Fabrication, Hillman-Circuits or PCB Stackup Design Guidelines, MOKO Technology
The key to designing a successful and compact layout lies in
prioritizing component placement and investing sufficient thought into it. By doing so, the routing process becomes significantly easier, ensuring shorter tracks and minimizing the need for excessive vias.
I commonly use this process:
- Design the board outline based on mechanical specifications.
- Place all connectors on the board anf lock them.
- Position all large components, such as decoupling capacitors or inductors.
- Group components into logical blocks (e.g., place decoupling capacitors near their respective pins, position the crystal next to the MCU, inductors close to the DC/DC IC ...).
- Arrange these logical blocks according to the flow diagram (e.g., USB transceiver near the USB jack, MCU adjacent to RAM, DC/DC close to PWR-In).
- For blocks that do not require a specific placement, prioritize the layout that minimizes vias and track lengths.
- Spend ample time shuffling these blocks around until you achieve a satisfactory arrangement.
- Don't hesitate to continue shuffling to optimize the layout further.
Important: If you can ease up your design by moving digital signals on the MCU, do it! The LED-GPIO can be any GPIO... So make your work a little easier!
Do you notice how well the memory bus is routed? All the tracks are perfectly parallel, and by making a slight adjustment to move the memory IC upwards, the fan-out process has become significantly easier.
This serves as an excellent example of how investing an additional 30 seconds of thoughtful consideration can save you up to an hour of routing time!
Please see: Guide on Component placement by PROTO-ELECTRONICS.com or 5 Basic Rules you need to know by Altium.com or PCB Component Placement Guidelines – Tips & Tricks by Circuits-DIY.com
Now you can commence with the actual routing. Typically, I follow this process:
- Start by routing all decoupling capacitors first, connecting them from the VCC-IC pins to the capacitors themselves and from the capacitors to the ground (GND) layer.
- Proceed by routing all IC-GND connections to the GND layer, utilizing vias when necessary.
- Next, route all clock (CLK) and crystal (XTAL) signals.
- Following that, route all high-speed digital signals, such as buses and memory interfaces.
- Afterward, route all low-speed digital signals, including enable signals and chip-selects.
- Then, route the VCC connections to the capacitors, completing the power delivery network.
- Lastly, do the left-over signals like LEDs or Buttons.
Please see: Our Top 10 PCB Routing Tips by PROTO-ELECTRONICS.com or PCB Design Guidelines for Reduced EMI, Texas Instruments or The Top 10 PCB Routing Tips for Beginners, Autodesk or PCB Design and Layout Guide, Microchip
At this stage, your layout is considered 'finished.' Take a break to allow yourself some time away from the design.
After the break, resume the process and scrutinize the layout for any small details that may still need attention, refining it to achieve a state of near-perfection.
This additional examination is
crucial because it often helps uncover
significant issues that may have been overlooked earlier in the design process.
If you adhere to these procedures, you can achieve a well-designed layout like this with minimal time and effort. However, it's worth noting that the complexity of your project may vary, and accordingly, the time required may differ as well.
You can find further ressources here:
Rayming PCB&Assembly Guide on 4-Layer PCBs
Weller-PCB Discussion on common 4-Layer stack-ups
12-Rules to properly desing a PCB stackup by PROTO-ELECTRONICS.com
PCB Reliability: Design Guidelines for Manufacturing, VSE
Reliability Analysis (RA), MATEK
Design for Manufacturing (DFM) , Altium
PCB DFM Guidelines – Design for Manufacturing, FS Tech
PCB Layout Design for Manufacturability: 5 Mistakes to Avoid, Matric
Key Elements Affecting PCB Manufacturability, PcbCart
21 Design Mistakes to Avoid on Your PCB for Mass Manufacturability, Predictable Designs
10 Tips To Improve PCB Design For Manufacturability, JHY