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I was hoping to get some feedback on a circuit I'm building. The schematic is as follows: enter image description here

Some description: This circuit essentially functions as a constant AC voltage source with current booster capability followed by a subcircuit to measure the current in the load. The input voltage is around 24-100 mV rms with frequency ranging from 4 Hz to 100 kHz. The load, as you can see in the middle, is an AC transmission line. In reality, it is a biophysical sample that works like a distributed AC transmission line, but here I approximate it by a discretized version consisting of a cascade of 4 RC stages.

The current supplied by the current booster stage is limited to around 65 mA (in practice ~80 mA) by the Q3 and Q4 transistors. This is roughly the maximum amount of current I want to send through my load. As you can see, I drive the load with small AC amplitude.

Edit 1: I simulated this part of the circuit alone.enter image description here The load is 10 Ω resistance. enter image description here The voltage of the virtual ground (inverting input -- blue line) is much higher than I like (almost half the driving voltage). What might be an explanation for this? Is there a way to fix this, to make it closer to ground? I suspect the culprit is the high current ~1 mA that the op amp has to sink. If this is the case, how should we bypass the op amp and drain this current after it passes through the feedback loop? If I change to bigger load 1 kΩ, the current is smaller ~10 uA, and the virtual ground is closer to the ground.

Edit 2: I simulated this circuit where the current sensor is current-boosted enter image description here I got time scan of virtual ground: enter image description here Bode plot: enter image description here The virtual ground's amplitude of oscillation is much less compared to the non-boosted current sensor, but it has an offset. I have trouble understanding where that offset comes from and how to fix it.

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  • \$\begingroup\$ OP37 is not unity-gain stable. \$\endgroup\$
    – glen_geek
    Jul 1, 2023 at 1:29
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    \$\begingroup\$ Have you simulated the various parts of your circuit and in combinations? \$\endgroup\$
    – Andy aka
    Jul 1, 2023 at 9:19
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    \$\begingroup\$ It doesn't just apply to you and your question; you find plenty things wrong with your circuit during simulation that you might have missed. On average, it usually saves about 1.5 PCB iterations per job. The more time you spend simulating, the cheaper it is in the long run and the quicker to market. \$\endgroup\$
    – Andy aka
    Jul 1, 2023 at 14:57
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    \$\begingroup\$ @PStechPaul I agree with adding the ceramic 0.1uF. Actually I always do that, but I just didn't make that explicit in this schematic. I know about adding a small resistor in the feedback loop. I read that using a matching 50 ohms would help minimize the bias current if the source's impedance is 50 ohms. But I tried that out and didn't see an improvement. Maybe the bias current is already quite small. I don't know. \$\endgroup\$
    – summeriok
    Jul 2, 2023 at 22:40
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    \$\begingroup\$ What is the actual problem? Can you do a parameter sweep or otherwise demonstrate the undesired behavior? \$\endgroup\$
    – PStechPaul
    Jul 2, 2023 at 23:05

1 Answer 1

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I refer to the AD711 datasheet.

This behaviour can be expected from any op-amp with finite bandwidth. In your case, the problem is due to a few things:

  1. High gain (100). The op-amp itself introduces phase shift between input and output. If the output were unloaded, gain-bandwidth product of the AD711 is 4MHz. With gain at 100, this places a pole at \$\frac{4MHz}{100}=40kHz\$, where phase shift is at 45°, but onset of phase shift occurs well below this frequency. As phase shift diverges from zero (or, strictly speaking, 180°, as this is an inverting amplifier), the output changes more and more out of phase with the input, and the usual equalisation of inverting and non-inverting input potentials is less and less perfect.

  2. Heavy output loading. R10, the 1kΩ feedback resistor around U2, is making it hard for the op-amp output to keep up with the input. Unloaded, the AD711 has a gain-bandwidth product of 4MHz, but the datasheet also specifies that at full power output, this can drop to 200kHz. You are getting close to full power with such a load as R10.

  3. I would also hazard a guess that the slightly non-sinusoidal trace of the virtual ground suggests that slew rate is also a factor here. With such a heavy load, I imagine that the slew rate has also dropped significantly from the 20V/μs specification, resulting in those somewhat straight-ish portions of that trace.

I'll redraw the section in question. Of interest to you here is the relationship between the signals \$V_{OUT}\$, \$V_{CURRENT}\$ (blue) and \$V_{VIRTUAL}\$ (orange), in the following bode plots of frequency response to \$V_{OUT}\$:

schematic

simulate this circuit – Schematic created using CircuitLab

Gain:

enter image description here

Phase:

enter image description here

The gain plot shows a clear roll-off of 20dB/decade at the breakpoint of 40kHz. I've set a green marker at the 10kHz point, and in the phase plot it's clear that phase shift has already begun at that frequency.

The most important trace here is the orange gain plot for \$V_{VIRTUAL}\$. If it were always true that an op-amp with negative feedback acts to equalise its two inputs, then that would be a flat line, of near-zero gain, right across the spectrum.

Obviously here that isn't the case, and from this graph you see that at 10kHz, the amplitude of \$V_{VIRTUAL}\$ is about 10dB down (one third) of \$V_{OUT}\$!


Update

Using U2 as a transimpedance amplifier to provide a virtual ground, and an output proportional to load current seems like a good idea, but it requires U2 to be able to source and sink all current through he load too. That means you would have to bolster the current capability of U2 with a buffer like the one that you used for U1.

Such an arrangement would permit you to measure current without the need for a sense resistor R1, since all load current flows via R10 anyway, with or without R1. R1 only serves to develop some voltage that should otherwise appear across the load, and introduce an error to the measurement.

To increase bandwidth, and maintain a virtual ground at high frequency, feedback resistor R10 should be similar to the load's impedance. Certainly not more than a factor of four greater, to keep loop bandwidth at 1MHz or above:

schematic

simulate this circuit


Update 2

Failure to achieve a virtual ground even at DC is clearly a problem with the op-amp being unable to produce sufficient output potential. It's probably a combination of the op-amp being asked for too much current, and R4 and R7 (10Ω) and R10 (4Ω) reducing loop gain considerably.

Driving 1Ω is difficult! You'll need a much better buffer stage to achieve 100mA through R11. Try this:

schematic

simulate this circuit

It's a "diamond buffer". This particular incarnation should permit you to drive a load of 1Ω with up to 1A or so. Q1 and Q4 (and their periphery) are 20mA current sources, used instead of your resistors R1 and R22 (5kΩ), which are huge problems in your own design, since they starve the transistors of the base current they need. They can't be reduced without overloading the op-amp, so you have to take a different approach.

I should also point out that with supplies of ±15V, all the transistors here are stressed, the power dissipated everywhere is much greater than necessary. If you could reduce the supplies to ±10V (or even further, without compromising the op-amp, of course), this will make a big difference. You'll still need to use power transistors for Q5 and Q6, as they dissipate over 1W.


Update 3

There's another approach which requires only one current buffer stage:

schematic

simulate this circuit

U1 is responsible for maintaining \$V_B = V_{IN}\$, by using negative feedback. It produces whatever potential \$V_A\$ is necessary to achieve that equality, even accounting for \$R_S\$ in its output current path.

All load current current \$I_L\$ must pass via \$R_S\$ anyway, so we have a voltage across \$R_S\$ representing load current. The second op-amp U2 is configured as a unity gain difference amplifier, producing \$V_{CURRENT} = V_A - V_B\$, which is the voltage across \$R_S\$, and therefore a measure of load current.

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  • \$\begingroup\$ Thanks. I just wonder if I can solve this issue with another op amp. How do I make a current sensor of mA range while keeping the current boosting capability of the first stage? Any idea? \$\endgroup\$
    – summeriok
    Jul 3, 2023 at 10:30
  • \$\begingroup\$ The reason that stops me from using shunt resistor is that I usually just solder my circuit with through hole components. I dont do PCB, so 0.01 ohms shunt is problematic. \$\endgroup\$
    – summeriok
    Jul 3, 2023 at 10:38
  • \$\begingroup\$ I can post this as a new question \$\endgroup\$
    – summeriok
    Jul 3, 2023 at 11:08
  • \$\begingroup\$ @summeriok It's not clear what this system is expected to do. By trying to get a virtual 0V on one side of the load, and presenting a low-impedance voltage source on the other, all you achieve is to place a controlled voltage across the load. That could be achieved by using a real ground instead, and all these concerns go away. Then you can use as many op-amps as needed to measure and amplify current sense voltage with whatever bandwidth you require. \$\endgroup\$ Jul 3, 2023 at 11:48
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    \$\begingroup\$ @summeriok See my next update. Another option you have is to use MOSFETs, since the signals involved are very low amplitude, and \$V_{GS(TH)}\$ is not so big a problem as it would be for systems where you want the output to get close to the supplies. Using MOSFETs could really cut down your transistor count. \$\endgroup\$ Jul 4, 2023 at 13:12

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