# How to calculate I_D and V_GS in a JFET with load resistance

When $$\V_\text{DS} = V_\text{P}\$$, thus $$\I_\text{D}\$$ will achieve maximum value hence equal to $$\I_\text{DSS}=10\text{mA}\$$. By substituting $$\I_D\$$ into $$\I_\text{D}=I_\text{DSS}\left(1-V_\text{GS}/V_\text{P}\right)^2\$$, I got $$\V_\text{GS} = 0V\$$. However by doing this way I'm ignoring the effect of load resistance and it's a 10 marks question I don't think it is this simple.

I have also try to use $$\I_D\$$ into $$\I_\text{D}=I_\text{DSS}\left(1-V_\text{GS}/V_\text{P}\right)^2\$$ to approach the question but there are two unknowns $$\I_D\$$ and $$\V_\text{GS}\$$ and I'm stuck. There are others information provided such as load resistance, $$\V_\text{DD}\$$ and $$\V_\text{GG}\$$ which I have try to relate them using following formula (Correct me if I'm wrong) : \begin{align} V_\text{DS} &= V_\text{DD} - I_D \cdot R_D\\ V_\text{GS} &= V_\text{GG} - I_G \cdot R_G \end{align} However, I cannot find a way to relate them to $$\I_\text{D}=I_\text{DSS}\left(1-V_\text{GS}/V_\text{P}\right)^2\$$ to solve it.

• Do you wan to have Vds = 4V? Yes?
– G36
Jul 3, 2023 at 14:52
• V_ds given in the question is equal to V_p so it should be -5.0V too Jul 3, 2023 at 15:01
• I think that you are wrongly interpreting the question. In your circuit, you cannot have negative Vds. It is simply impossible.
– G36
Jul 3, 2023 at 15:31
• I'm actually new to this so I thought that would be the case. If only the magnitude is equal it makes much more sense. Jul 3, 2023 at 15:47

Disclaimer. I am assuming that $$\V_\text{DS}=\lvert V_\text{P}\rvert\$$ since only in this case the condition $$\V_\text{GS} -V_\text{DS} \le V_\text{P}\$$ under which the fundamental formula for $$\ I_\text{D} \$$ is applicable surely holds. Despite this, we'll see that there are some incongruences from the point of view of the schematics shown in the OP: precisely, the gate circuit cannot be the one shown.
Let's start by considering the anode mesh: by applying the Kelvin Voltage Law (KVL for short) we have $$V_\text{DD}-R_\text{D}I_\text{D}-V_\text{DS}=0$$ Since $$\V_\text{DS}=5\text{V}\$$ and $$\V_\text{DD}=16\text{V}\$$ are known you have that $$R_\text{D}I_\text{D}=V_\text{DD}-V_\text{DS}\iff I_\text{D}=\frac{V_\text{DD}-V_\text{DS}}{R_\text{D}}=\frac{16\text{V}-5\text{V}}{10\text{k}\Omega}=1.1\text{mA}$$ Now you can use the fundamental $$\I_\text{D} = f(V_\text{GS})\$$ by plugging in it the found value of $$\I_\text{D}\$$ $$\begin{split} I_\text{D} = I_\text{DSS}\left(1-\frac{V_\text{GS}}{V_\text{P}}\right)^2 &\iff \sqrt{\frac{I_\text{D}}{I_\text{DSS}}} = \left(1-\frac{V_\text{GS}}{V_\text{P}}\right)\\ &\iff {V_\text{GS}}= V_\text{P}\left(1 - \sqrt{\frac{I_\text{D}}{I_\text{DSS}}}\right)\\ & \iff {V_\text{GS}}= (-5\text{V})\left(1 - \sqrt{\frac{1.1\text{mA}}{10\text{mA}}}\right) \\ &\iff {V_\text{GS}}= (-5\text{V})\left(1 - \sqrt{{0.11}}\right)\\ &\iff V_\text{GS} \simeq -3,34\text{V} \end{split}$$ Notes
The result found is in contrast with the circuit in that in the schematics is shown a $$\V_\text{GG}\$$ voltage of $$\-1\text{V}\$$ (respect to the source): this clearly cannot be as by applying the KVL law to the input circuit the have that $$V_\text{GG}-R_\text{G}I_\text{G}-V_\text{GS}=0 \iff V_\text{GG} \le V_\text{GS}\iff V_\text{GG} \le -3,34\text{V}.$$ Possibly, the text of the exercise was added to a picture draw for another one, and this caused a bit of confusion.