I'm currently working on a project for a MIPS Datapath Simulation website. The project aims to demonstrate how instructions work. I've implemented the Alu Control Unit using the combinational logic shown in this image:

enter image description here

I'm facing an issue with the addi instruction. While the AluOp is set to 11 for addi, since it's an I-type instruction, the func bits are X (don't care). However, the current logic doesn't allow for overwriting in this case. Do I need to modify this component for addi instruction? I've been searching for the past 3-4 days, but I haven't come across any specific implementations for I-type instructions.

By the way, I'm primarily a software developer and I'm trying to gain a better understanding of MIPS CPU design. Any additional resources or references you could provide would be greatly appreciated.

For anyone who wants to try the simulation, here is the current demo: https://saliherdemk.github.io/Mips-Datapath-Simulator/

  • \$\begingroup\$ Based on your specification, you’ve answered your own question. Basically, if the func bits are don’t care, then you need to modify your logic to cater for this. Is there a reason you don’t use a lookup table to implement the logic function? \$\endgroup\$
    – Kartman
    Jul 5 at 19:09
  • \$\begingroup\$ I followed up this implementation comp.nus.edu.sg/~adi-yoga/CS2100/ch08c2 I assume that this implementation covering all the cases, like a real cpu. That's why I'm asking a additional resources if there is a more geniune logic function for this. \$\endgroup\$
    – Phronesis
    Jul 5 at 20:00

1 Answer 1


I didn't find any circuit for this so I ended up with this design. enter image description here

It works for add, sub, and, or, jr, addi, lw, sw, beq, j and jal instructions.

And here is the js implementation

  let a1 = aluop0 && aluop1;
  let a2 = (f1 && aluop1) || aluop0;

  let op2 = a1 ^ a2; // (!a1 && a2) || (!a2 && a1)
  let op1 = !f2 || !aluop1 || a1;
  let op0 = (f0 || f3) && aluop1 && !aluop0;

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