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I am trying to design a system which has some sensors connected to an FPGA and want to transfer the sensor data from the FPGA to a microprocessor like NXP IMX. I am new to FPGA and would like to know what options I have to do that, and what are the pros and cons.

Are there processors which have special interface for FPGA? I read some online content and some articles which suggest to use external memory bus interface for it, but I don't know if it will work.

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    \$\begingroup\$ It depends what interfaces the MCU has and what you need. There is no best for all purposes. \$\endgroup\$
    – Justme
    Jul 6, 2023 at 21:37
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    \$\begingroup\$ you can use just about any interface you want, IIC, SPI, parallel.... \$\endgroup\$
    – Aaron
    Jul 6, 2023 at 21:57
  • \$\begingroup\$ what kind of bandwidth do the sensors need? SPI is quite easy to implement on an FPGA and most microcontrollers have this, but there are many possibilities. \$\endgroup\$
    – danmcb
    Jul 7, 2023 at 7:11
  • \$\begingroup\$ I want to consider two scenarios, firstly, a seperate board for processor board and FPGA board communicating via ethernet or LVDS protocol. I can see in LVDS pairs pin in fpga pinout digram. Will it be better to use LVDS or ethernet. Secondly, if both processor and FPGA are on the same board, I want to use memory controller of microprocessors or micrcontroller to read data from FPGA treating it as a memory device. I need to transfer data from an 12 bit ADC connected to FPGA and need fast data transfer as I need to show it live. \$\endgroup\$ Jul 7, 2023 at 17:20

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As the comments already posted have suggested, there are many ways to interface a PLD to a microcontroller. Your decision should be based on two primary considerations: how frequently the data needs to be updated to the microcontroller, and how many pins on the microcontroller and PLD are available for transferring the data. If the data needs to be updated frequently (under 10ms or so), a parallel interface is generally preferred, but this requires the most number of pins between the PLD and microcontroller. Less frequent updates can use SPI or IIC which require very few pins.

In practice, I (as a firmware engineer) prefer parallel interfaces whenever possible for their ease of use (i.e. I can access the data any time I want without having to wait for an IIC or SPI transaction to complete). The actual interface you end up using should take all of these into account.

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  • \$\begingroup\$ Please go through the comment I have added to the question. Please help if you have an answer \$\endgroup\$ Jul 11, 2023 at 19:23
  • \$\begingroup\$ I would not recommend separate microcontroller and FPGA boards due to the data throughput that is likely required to show the data "live". \$\endgroup\$ Jul 12, 2023 at 14:52

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