# Seeking circuit of precision rectifier (or absolute-value) with "high bandwidth"

I need to detect (convert to DC, or low frequency <1kHz) the amplitude of a signal. The signal at full-scale is quite large, being a 1MHz sine-wave, with zero-offset and peak-to-peak amplitude of 20.00V (+10V, -10V peaks). It sounds easy enough, but it needs to measure the signal accurately when the amplitude is just 1% of full-scale (0.1V peak) so the usual diode detectors are simply not suitable due to diode Vf being ~0.5V.

Op-amp-based precision rectifiers (refer Note 1, below) may be suitable, but the relatively high frequency of 1MHz may prove challenging for typical opamps having GBWP~2MHz & slew rate ~1V/us. The bandwidth of the detector output is not that high, about 1kHz.

I found an article dated 15-May-2003 by Ron Mancini titled: "Absolute-value circuit delivers high bandwidth" (Note 2, below), the 2nd & 3rd sentences of which seem to offer everything I seek:

The circuit in Figure 1 uses three fewer components than most absolute-value circuits require, and only two of the resistors must have 1% tolerance to obtain 1% accuracy. This circuit's output voltage is an accurate representation of the absolute value of the input signal, and it is accurate for input signals containing frequencies as high as 10 MHz.

To my dismay, Figure 1 is not available - I even tried the Wayback machine without success.

I would be grateful if someone could furnish this article from Mr. Mancini in its original form, or some other source that shows the schematic.

Update: this article with schematic was found, refer posts below, my sincere thanks to @Daniele Tampieri, and @bobflux.

Alternatively, can anyone suggest a simple circuit that does not use more than two (2) op-amps to achieve this? The output can be either full-wave (absolute value) or half-wave (precision rectifier,) preferably operating from a single supply rail of +12V, which unfortunately precludes the rather nice solution offered by the TI app note TIDU030, as explained in Note 3. The output of the detector is to be 0V to 5V (0% to 100% of input) with linearity within 1% and offset < 1%.

Note 1

Note 2

Note 3

## Updates (after Original Question posted)

Update: Thanks to all the respondents. I have started collecting possible solutions and will attempt to evaluate them over the next few days. My preference is for solutions that use standard speed op-amps (1MHz, 1V/us) and jelly-bean parts. I have a response below that is my attempt at collating the images for solutions that did not have images originally in this post (& its subsequent answers). I will post my findings when they are available. Thanks again to all contributors.

Update 2023-Jul-29 Apologies for the delay in responding, I was diverted to other activities over the past few weeks. A solution was developed via LTspice, using common BJTs, which met the criteria once the requirements regarding zero-signal offset were relaxed. The solution has an accuracy of within 0.5% for a signal range from 10% to 100%, and within 1% for signal range from 5% to 100%, for a carrier of 1MHz. Performance at higher carrier frequencies may be explored at a later date. Thanks again to all contributors.

• May I suggest that the terms "peak detector" & "absolute value converter" be considered for inclusion as official tags. I could not do this myself as I do not yet have the prerequisite reputation points. Jul 10, 2023 at 5:31
• Here's the full article with figure: xdevs.com/doc/_Magazines/51503di.pdf Jul 10, 2023 at 8:49
• @bobflux Many thank for that, Bob. Cheers. Jul 10, 2023 at 9:19
• @FabioBarone - Hi, (a) Naming other people in a question (or answer) using @username will not notify them (as designed, that only works in comments). (b) Also, it generally isn't appropriate to do here (remember, this site isn't for socialising). Therefore I have deleted that part. Your last update is enough (even saying thanks there is strictly not allowed but I won't remove it - although someone else might do so). || If you reply to this comment so I know you've read it, then I can delete it. Thanks. Jul 29, 2023 at 1:15
• @SamGibson Hi, OK, not sure how to respond here. Perhaps I have misconstrued the function and intent of this website. I will attempt to express my concerns here, again, apologies for my ignorance: 1. Please understand that I am not trying to use this site to socialise, just thought it would be acceptable to acknowledge the contributions of others as a common professional courtesy. I am shocked that saying "thanks" is strictly verboten. 2. What is the protocol to at least alert contributors to an update? Jul 29, 2023 at 1:25

I'm fond of this one:

Performance (bandwidth and offset/balance) depends largely on the op-amp chosen. The diode should have low capacitance, and lower impedances/resistor values can be chosen to deal with the diode capacitance (BAV99 or BAS70 would be better than BAT54 generally).

There's also the variation with a single diode (the top one), which has the disadvantage that IC1B's output is unconstrained and therefore saturates while the input is positive. This incurs an apparent recovery delay due to the op-amp's limited slew rate (also called integrator windup). Thus, the lower diode is not strictly necessary for basic function, but improves switching speed. (With dual diodes being essentially no added cost, this is an easy win these days.)

A few MHz is not very high, and an op-amp of some 20MHz+ GBW will do, readily available in western markets. At that voltage level [±10Vpk], slew rate will be the bigger limitation; a JFET type would probably do nicely.

### Of Transistors

I won't go into detail of possible discrete solutions here; needless to say, the design space is vast, and... none of it is particularly good. But it may be more interesting to explain what "good" is, and why this is the case.

If the baseline comparison is an average 1MHz op-amp like LM358, then there is at least a little merit to considering discretes. In terms of raw bandwidth, general-purpose transistors are usable up into the 10s of MHz. You can certainly build an op-amp faster than an LM358, and with your own choice of compensation, it can potentially have much more gain-bandwidth.

The biggest hurdles I would say are:

• High supply consumption: transistors are board-level, not chip-level: bias currents / load impedances must overcome larger junction plus node capacitances to achieve equal bandwidth. The bandwidth per mA is a small fraction of an integrated solution.
• Parts count, is quite high even for a very basic (imprecise) implementation, let alone a well-developed one (having performance directly competitive to ICs at all corners of operation).
• Exponentially more labor is required to design, assemble, and calibrate to a given level of precision.

In particular, monolithic BJT arrays are boutique items these days, and only match within a few mV anyway; matched pairs are available cheaply, but they are independent-die parts which do not track thermally. Maximum dynamic range requires a calibration procedure (and perhaps temperature compensation and further adjustment). Contrast with an op-amp solution, which provides guaranteed bandwidth and input offset voltage, no calibration required, all in a cute little package.

And there are no other op-amp components (read: components that an op-amp would be constructed from) available these days, at least not in any better quantity, performance or cost. For example, ideal transistors, current conveyors, operational transconductance amplifiers (OTAs), etc. (There are still a few OTAs, but that's the point: selection is quite thin.) So the next best option would be to construct these building blocks from whole cloth. (And by "cloth" I mean "tape", and by "tape" I mean tape-and-reel. 😊 )

With typical parts counts in the multiple dozens, even if using 0201s and DFNs/CSPs, you'll have a hard time beating the footprint of even an SOIC package op-amp, let alone MSOP or SON. And such small components may incur additional assembly costs (somewhat fewer CMs offer the capability).

So you can spend quite some time designing such circuits (or collecting the works of our forefathers -- important work, back when ICs were new, expensive, and few types were available!), plus adjusting multiple trimpots to get each circuit balanced say within a fraction of a millivolt.

That's not to say there's no merit in researching these things, but it greatly limits the field of applicability. Needless to say, it's well outside of economic value in almost any market around the world (which, as a practicing EE, is the angle I generally approach problems from). That does leave some interest related to IC design (at least, for the few designers still working with bipolar devices at sub-bleeding-edge frequencies?), and historical, academic or didactic purposes. (I'm personally quite fond of a good clever analog circuit, or at least, I was; it's been many years since I've had reason to use anything beyond a transistor or diode here and there.)

There is one idea that comes to mind, which need not be applicable in general, but may be useful in some cases. This is applicable to either case (discrete or op-amp). A harmonic balance method could be used to self-calibrate the circuit. Suppose the input is pure AC, no DC, and an odd waveform (no even harmonics). A perfectly balanced output has zero fundamental. The basic operation of such a scheme would resemble a MPPT (maximum power point tracker), which is no accident as the power transfer function has a quadratic (i.e. rectifying) characteristic to it as well.

### Alternatives

If after all of this, you find yourself working into a difficult corner, you may have hit a wall on an already-solved problem. You may be working with a problem, whose preferred solutions are beside the route are following.

For example, if bandwidth is a problem, and the signal is largely sinusoidal, consider frequency conversion (hetrodyning). This converts the rectification problem to a much lower frequency, where general-purpose op-amps are effective. This does not, however, dodge the problem of bandwidth: that is, if your signal spans from 10 to 20 MHz, shifting it down to an IF of say 2-12 MHz doesn't win you very much.

If dynamic range is a problem, consider compression (intermediate-frequency amplifier, log detector, etc.). If phase is available, consider a synchronous method (see Antonio51's answer). (Even if phase isn't available, a coherent quadrature detector can be used.) If the source/stimulus is under your control, consider modulating level instead, or in addition to, whatever your detector is doing.

• +1. This is also one of my favorite rectifier circuits. If properly designed, it suits perfectly a variety of needs. The only reason for which I did not proposed it in my answer is that I like also very much Heywood's circuit, which works perfectly even at $10.7\text{MHz}$ and for $V_\text{in}$ as low as $10\mu\text{V}$. Jul 10, 2023 at 8:48
• @Tim Many thanks for that circuit, I will simulate that later and see what the op-amp BW and slew-rate requirements are. I was hoping to get away with existing op-amps as stated in the OP with perhaps some Qs added (BC857C, BC847C) if necessary. Thanks for the advice on the other options also, your points are well taken. Jul 10, 2023 at 9:48
• @FabioBarone You can't polish a turd in electronics, I'm afraid. If all you have is LM358s and BC8(4/5)7s, you're going to need to either find another solution, or find some way to source better parts. Jul 10, 2023 at 12:26
• @FabioBarone I figured this deserves a better explanation than a brief comment -- see edit. I don't know what CC+amp approach you suggest; perhaps you could add an example to one of your answers? Jul 11, 2023 at 9:51
• @TimWilliams Many thanks for your detailed edit, I agree with the points you raised, and share much of your sentiment also. For various reasons, in this particular case I am stuck with the slow opamps, and yes, this will have to be a PCB-level solution which is quite OK. The 1% offset & 1% linearity specs give me hope that a simple hybrid opamp + discrete solution will succeed - there would slim chance of success if the specs were 1 or 2 orders of magnitude tighter. I do intend to post the implemented solution when it is complete. Thanks again, and cheers. Jul 11, 2023 at 20:40

Disclaimer: I have never tested this circuit.

An inverter (E1) at the input creates an inverted version of the signal.

Both normal polarity and inverted signal drive the input stage of a simple discrete opamp. The input stage has an extra transistor, and Q21/Q23 conduct depending on input signal polarity. In fact this input stage takes as positive input the maximum of the two voltages on Q21/Q23 bases.

• Interesting concept, thanks for sharing. I will have a think about it, maybe do some simulations, and let you know, but will take me a couple of days to get back to you. In the meantime, here is one idea that I had considered as a possible solution, published by David Knight. g3ynh.info/circuits/AM_det.html Jul 10, 2023 at 10:14

Just adding here some images of the circuits suggested by some of the respondents to my original question (@Daniele Tampieri, @bobflux), & some new sources, for the convenience of future readers.

Below: Image of the original article mentioned in the OP, by Mr Mancini:
Title: "Absolute-value circuit delivers high bandwidth"
Author: Ron MANCINI, Texas Instruments
Publication: EDN, 15-May-2003.
See PDF page 5 of this:
https://xdevs.com/doc/_Magazines/51503di.pdf

Below: Image of the circuit by Mr Heywood:
Title: "Precision Full-wave Rectifier"
Author: Darren HEYWOOD
Publication: Electronics World, Jan-2003.
See PDF page 38 of this:

Below: Image of the first page of the article by Mr Bate (posting the complete PDF did not work):
Title: "Precision Rectifier Circuits"
Author: Alan BATE.
Publication: Electronics World, May-2004.
See PDF page 28 of this:

Below: Image of the first page of the article by Mr WILMSHURST.
Title: "WIDE-RANGE ABSOLUTE-VALUE CIRCUIT"
Sub title: "Full -wave precision rectifier with 75dB dynamic range and 20kHz bandwidth offers design trade-offs"
Author: T.J. Wilmshurst
Publication: Electronics & Wireless World, March-1987.
See PDF page 23 of this:

Below: Image of the circuit proposed by David KNIGHT:
Title: "A Linear high-frequency AC voltmeter and AM detector"
Author: David W KNIGHT
Publication: See website links:
https://www.g3ynh.info/circuits/AM_det.html
https://www.g3ynh.info/circuits/push-pull_det.pdf

The circuit proposed by Ron Mancini has the following structure

simulate this circuit – Schematic created using CircuitLab

You can find the original copy of Electronic Design here, Ron's design idea at page 80.
However I do not advise you to use this circuit since for very fast signals, i.e. for signals whose rise time $$\t_r\$$ is comparable with the settling time $$\t_s\$$, you may see strange effects due to the fact that the OpAmps global feedback may not respond quickly enough.

A better realization is the one by Darren Heywood, "Precision full-wave rectifier" Electronics World, January 2003, p. 36, for which I was not able to found a scanned schematics and which is, however, far more complex than Mancini's circuit.

• Many thanks, I may have found that article by Darren Heywood, see PDF page 38 here: worldradiohistory.com/UK/Wireless-World/00s/…. Is that the one you had in mind? If so, then Heywood's design idea entry was followed up by a full article by Alan Bate dated May 2004, refer PDF page 28 here, in which some improvements to the original design were proposed: worldradiohistory.com/UK/Wireless-World/00s/… Jul 10, 2023 at 9:36
• Yes, the one at page 36 Fabio. And the paper by Alan Bate that you found seams even better. thank you for pointing it out. Jul 10, 2023 at 9:47
• You're very welcome, cheers. Jul 10, 2023 at 10:35

Just sharing this image here of a half-wave precision rectifier based on a current-conveyor, and associated waveforms, as shown on PDF page 20 (page 18 of the hardcopy) of this ref: https://cas.ee.ic.ac.uk/people/dario/files/E416/cc_handout07.pdf

This uses one-half of a device from LTP Electronics (Oxford, UK) known as CCII01, for which I cannot seem to find a datasheet. Regardless, the performance is quite impressive.

• Fabio, it seems that you've been able to collect in a single Q&A a great deal of what is known about precision ideal rectifiers: +1, well done! Jul 11, 2023 at 7:21
• Thank you Daniele, but I must confess: I am merely "standing on the shoulders of giants"; I am simply finding and sharing the work of others done decades ago. It is these pioneers that we should be thanking. Many years ago this sort of investigation would have taken days or weeks - going to the local library, asking for a journal, waiting for it to arrive from some other library in some other city. The internet lets me do in minutes what took weeks. But now the problem is we have too much information, and it is difficult to find the nuggets of wisdom among all the noise. Cheers. Jul 11, 2023 at 8:04
• @FabioBarone It may be small in the grand scheme of things, but I will say this: Stack in general has a bad habit of not providing references; seeing actual citations is a breath of fresh air! Jul 11, 2023 at 8:37
• You can construct this kind of rectifier by using the OTA part of a OPA615 (see the answer I gave to your question here. Jul 11, 2023 at 9:51
• @DanieleTampieri Grazie mille Daniele, I have responded to that post, cheers. Jul 11, 2023 at 21:50

At this frequency, use a synchronized "sampled" detector.

• Hi Antonio, thanks for responding, yes I am aware of synchronised sampled detectors but I have never used one, however, I'm not sure I am following the circuit completely. Is the intent of C5 & L1 to create a delay such that the pulse [Vcomp] turns the switch S1 on at precisely the moment when Vm is at its peak? If so, then it would seem these components, and perhaps even the time delay of the opamp LH4101, are critical to getting the timing correct. Is that the case? BTW, that opamp is plenty fast: 45MHz GBWP and 250V/us - wow! Jul 10, 2023 at 7:06
• Yes, C5 & L1 & R5 are used for "delaying" ... until Vm is sampled at its max. High frequency is supposed to be "constant". Jul 10, 2023 at 7:31

Apologies for the delay, posting here now the answer developed in-house (by myself) that was accepted based on LTspice sims, for implementation at a later date. Here is the overall circuit below, made of "jelly-bean" parts:

## Brief description of the circuit:

The input voltage is converted to a current source (10V peak -> 500uA peak), this current flows into a two-transistor common-base stage (Q1_412, Q2_412) that directs the current into separate collector circuits based on polarity. The lower output (Q2) is used for the output since it is referenced to 0V (gnd). The upper output (Q1) is not used, but could be directed to the output (Q2 collector) via an additional current mirror to form a full-wave precision rectifier if so desired (not required in my case). Image below shows input signal and Q1, Q2, please ignore R276:

The collector current of Q2 is converted to a voltage by resistor [Rgain_412], the value of which is set to the ideal value times a correction factor; viz:
(20k * 1.571) being the ideal value to convert 10V peak half-sine (500uA peak) to 5Vdc average;
and 1.019 being the correction factor to trim the output to 5.00V+/-20mV at 100% input due to the non-ideal transfer function of the circuit at the AM carrier of 1MHz. This is then filtered by a two-stage RC filter to get the desired ripple and step response.
(Aside: this correction factor suggests the gain reduction at carrier of 1MHz is just 2%.)

Image below shows the output filter:

## Sources of Error, and Mitigation of Same:

There are two major sources of error (or non-linearity, ie: the degree to which currents in Q1 & Q2 collectors deviate from the input signal current).

The first is the AC voltage at the input of the common-base stage. Ideally this should be zero to keep signal current directly proportional to signal voltage, but in reality will vary with Vbe of each transistor Q1 & Q2 as each is exercised over the full range of the carrier signal. Note that collector current of both Q1 & Q2 will vary by 3 to 4 decades as signal amplitude varies from 0 to 100%, so we would expect Vbe for Q1 & Q2 to deviate by at least 180mV to 240mV (using the "rule of thumb for small-signal BJTs": $$\\Delta\$$Vbe=60mV per decade of collector current).

The error is dramatically reduced by a simple error amplifier formed by Q5, and fed by Q3 & Q4. This error amp also sets up the bias conditions. In this case, the emitter of Q2 is biased to about 8V so that Q2 collector has plenty of headroom available for the output voltage required.
Image below shows the error amplifier:

The second source of error is the quiescent Vbe bias of Q1 & Q2, which is set by Qbias_412 configured as a Vbe multiplier. It was found that not having any bias (Q1 & Q2 bases tied together) caused what appeared to be "reverse recovery" current to flow between Q1 & Q2 at the zero-crossings of the input, which distorted the current in the collectors of Q1 & Q2. This "reverse recovery" current turned out to be base current flowing in the reverse direction of the transistor that was turning off, and flowing into the emitter of the incoming transistor. According to the simulation, this was due to the charging & discharging of the B-E junction capacitance during the zero-crossing. Adding a bias voltage reduced the swing of Vbe thus reducing this "reverse recovery" current.

However, there is a trade-off: increasing Vbe bias sets up a quiescent collector current, which then sets up a significant output offset voltage at zero signal, and a dead zone where the output does not respond to the input signal. The bias was adjusted such the reverse recovery current was largely eliminated, and the Vbe swing for both Q1 & Q2 was reduced to just 250mVp-p for all input signals including 100% (reduced from about 1.22Vp-p swing in the case for no bias). This reduced swing also made the life of the error amp easier, since its output swing (Q5 collector voltage) reduced from 1.22Vp-p to just 0.25Vp-p. Refer image below for the bias circuit.

## Simulation Results for AM Carrier of 1MHz:

Here are the results of the solution for a carrier of 1MHz, where 100% signal is 10V peak, and measured (by simulation) at 0%, 1%, 2%, 5% 10%, 20%, 50% and 100%. The circuit was trimmed by adjusting the correction factor for [Rgain_412] to 1.019 to give an output of 5.00V+/-20mV for 100% signal (10V peak).

Image below: output (vertical) vs peak of input (horizontal).

Image below: zoom of previous near zero.

Image below: error compared to ideal. We can see that the error from ideal stays within 0.5% for signals above 10%, and within 1% for signals down to 5%. The loss of accuracy at low signal was deemed acceptable for the application.

Image below: The waveforms of Q2 Vbe (brown) and Ib (green) at 100% signal, cyan trace is for the case where bias is zero volts.

Image below: Waveforms showing "reverse-recovery" effect.
The "reverse-recovery" effect is clearly visible at the start of the pulse when Q2_Ic first begins to rise from 0, during this period Q1 supplies the current for the signal source thus robbing it from the input to Q2. Q2 returns the favour at the end of the rectified pulse when its collector current falls back to 0.

Upper: Signal current (Rsig_412), & Q2 Ic for (a) biased case (Q2_412) and (b) non-biased case (Q2_112).
Lower: Q2 base current for biased case (Q2_412) and non-biased case (Q2_112). Large current spikes at the zero-crossings have been reduced by the Vbe bias.

Image below: response to a step pulse (0% to 100% to 0%).
Upper: input to AM modulator.
Middle: ideal detector response (with same filter), and circuit response.
Lower: error compared to ideal.

Image below: ripple at 100% input, ripple is 60mV p-p.

## Alternative Circuit:

The circuit below is an alternative with almost identical performance, the main change is that the error amplifier is now implemented as a differential pair. C97 & C158 around Q3_414 can be ignored, these are placeholders for bandwidth limiting caps in case they are needed to ensure stability for the real-world production circuit.

Compared to the previous circuit:

1. Total number of transistors is unchanged.
2. The bias network for node [EA+_414] was changed so that Q2_414 emitter voltage is the same as for the previous circuit (~8V).
3. Bias current for the diff pair is set by [Rdiffbias_414] and was selected so both circuits present the same current drain on the +12V supply at no signal.
4. Resistor [RQ3c_414] was selected so collector currents of the diff pair were balanced.
5. Gain resistor [Rgain_414] needed a slight adjustment to give the required output of 5.00V+/-20mV at 100% signal.
6. Gain of this new error amp is about half that of previous error amp (voltage across its inputs is 26mVp-p vs 11mVp-p for previous error amp, for same Vout of ~250mVp-p), but this has a negligible effect on overall performance of the detector.

Image below shows the complete alternative circuit:

Image below shows the error amplifier section:

Images below show the error amplifier input voltage (EA- wrt EA+) at 100% signal (just before the modulating signal drops to 0) for both circuits:

## Edit 15-Aug-2023: Frequency Response

Just for completeness, adding here the sim results showing the output of the peak detector as the carrier frequency is increased. The output is down by 10% from ideal at F=5.5MHz. The results suggest this peak detector is usable with input signals up to about 5MHz, depending on acceptable levels of frequency-dependant error.

If the input frequency is kept within a narrow range, then a compensation factor can be applied to the output (via [Rgain]), extending the usable frequency out to 10MHz or possibly even 20MHz; but input sensitivity may be affected.

Image below shows the response as input frequency is increased. The input to the peak detector is a 10Vpeak sinewave generated by a VCO, the frequency starts at ~10kHz and starts to ramp up from T=100us.

Upper chart: VCO input, 1V==1MHz.
Lower chart: purple trace=output (ignore red and green).

Here is a minimum component count precision rectifier with good performance at 1 MHz,

It still works at 5 MHz, but the output is distorted.

CircuitLab has one high speed op-amp (AD797 110 MHz) but it has a bit of distortion (and it's a \$15 part!):

simulate this circuit – Schematic created using CircuitLab

• Thanks, yes, that is very much like the circuit published by Intersil (CA3140 datasheet dated Sep 1998, fig 26). A worthy contender, however, it needs a fast op-amp (the AD8065 has GBWP=145 MHz, slew-rate=180 V/µs), which was simply not available to me for this project. I was stuck with op-amps with GBWP~1MHz, slew-rate~1V/µs. Cheers. Aug 26, 2023 at 8:24