Is it okay to have PCB traces going inbetween a 2.54 pitch pin connector?

Question

I have made a design and I am now creating a PCB board for the first time. I ended up using the "Auto Route" feature on the EASYEDA software because I have to make a lot of connections and it was kind of hard make the connections myself in such a small area.

Because of this the auto route feature ended up putting PCB traces inbetween the 2.54 pitch through hole connectors shown in the image below:

Is this okay? Or does that not provide enough clearance? I'm pretty new at designing a PCB so any help would be appreciated!

Answer 1

Running tracks between pads on 0.1" (2.54 mm) spacing was common practice with through-hole parts - IC leads were on 0.1" spacing.

If I recall correctly, I normally used .060" (1.5 mm) pads and .012" (0.3 mm) tracks - that allowed .014" space between track and pad.

Answer 2

If it meets the trace width and clearance design rules, then it will be manufacturable.

Assuming you don't have any weird impedance control or high frequency (>> 100 Mbps) signals, then in all likelihood it will work just fine as routed.

2.54 mm pitch headers usually have a pretty large amount of space between the pins, so it is pretty common to find signals routed in between them.

Answer 3

You need to satisfy the constrains set by the PCB fab.

The hole has to be in an acceptable range to accept the connector pin.

The annular ring has to be at least as big as the minimum the fab specifies, and may have to be bigger in order to provide mechanical strength depending on your requirements- you are free to use non-circular pads if you want to for mechanical reasons.

The clearances on either side of the pads have to be large enough to be manufactured and they have to meet any other requirements you may have (such as for elevated voltages)

The trace has to meet the minimum trace width requirement for fabrication and to meet any other requirements you may have (they can be necked down in close proximity to the pads in order to sneak through if you need wider traces for current-carrying or trace resistance reasons.

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To pick an example, say you are using this Molex connector and JLC PCB design rules.

The recommended hole size is 1.02mm (from the linked drawing).

The minimum track to via spacing is 0.2mm and the minimum trace width is 0.127mm. Let's say you use 0.2mm for all three (about 8 mil trace and space) and, so you need 0.6mm for the trace and two spaces.

That means the pad can be 2.54mm - 0.6mm = 1.94mm diameter.

The minimum annular ring is 0.13mm so you can have a pad of minimum 1.02 + 2* 0.13 = 1.28mm diameter so there's plenty of margin.

You might choose to use 1.9mm diameter pads to give good strength.

Other manufacturers will have similar capabilities, for example OSHPARK does not allow 0.127 mm traces (0.1524 mm minimum) and there are some other small differences but the above choices (0.2mm trace width and clearances and 1.9mm pad) will also be manufacturable by them. It's good to avoid using the absolute minimum clearances, annular ring and trace widths because it reduces manufacturability and may reduce the choices of fabs without tweaking the design. That goes double for dimensions that appear in many places on the board (such as trace widths and clearances for most of your traces, annular ring and drill diameter for vias, and clearances around copper pours).