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I have STM32L451 and need to configure TIM3 to generate short pulses (duration is in the range of 1..10 us) and long time intervals (1 second) between the pulses on three PWM channels. The pulses in the PWM channels should start at the same time, and the duration of the pulses in the channels may be different from each other. The signals that I need to get on PWM outputs

This cannot be achieved with TIM3 only, because the timer period is more than 65536*pulse width.

The obvious idea is to use another timer (say, TIM1) with a higher prescaler value as a master timer for triggering TIM3 that runs in One-Pulse mode.

I set TIM3 in Combined Reset Trigger slave mode and its PWM channels in PWM mode 1.

The problem is that after TIM3 counter register reaches the ARR value, the counter is reset to 0 and the PWM output becomes active until the next reset event. So the PWM channel generates not a "one" pulse of (CCRx) width, but a "zero" pulse of (ARR-CCRx) width.

I tried to configure the PWM channels in PWM2 mode and the polarity of the pulses become correct, but in such configuration the pulses are right-aligned, while I need left-aligned.

Is it possible to configure the timers to generate the pulses the way I need?

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    \$\begingroup\$ Please define the precision/resolution required. Are the pulses needed with only 1us steps, 1us, 2us.. 10us? How precisely the 1 second must be, also 1us resolution? Can it vary with some tolerance, as long as the 3 PWM channels are aligned to start at same timer tick? \$\endgroup\$
    – Justme
    Jul 12, 2023 at 7:21
  • \$\begingroup\$ The required resolution is 1 us, and the precision of the 1-second interval should be the same. All the channels should start pulses on their outputs at the same tick of the 1-us timer (as it is drawn in the figure above). \$\endgroup\$
    – hdmi87
    Jul 12, 2023 at 13:45
  • \$\begingroup\$ The chip has one 32 bit timer. \$\endgroup\$
    – bobflux
    Dec 18, 2023 at 13:46

1 Answer 1

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Since the PWM mode output comparisons are TIMx_CNT<TIMx_CCR1 or TIMx_CNT>TIMx_CCR1 you can change the direction of the counter with the DIR register so that cnt 0 equals OC1REF = 0.

You can also use the CC1NP polarity bits.

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