# How does this peak detector circuit work as expected

In The Art Of Electronics by Horowitz-Hill, 3rd edition (chapter 4, paragraph 4.5.1, figure 4.58) the following peak detector is presented:

simulate this circuit – Schematic created using CircuitLab

The capacitor is devoted to store the last highest value of Vin, which is then transferred to the output through a voltage buffer.

This circuit should be able to exactly follow Vin, but I can not understand why. The V- terminal of the opamp is at the same voltage as the capacitor. When Vin rises above this value, the opamp has a non-zero input, so it amplifies it. The output of the opamp is G*(V+ - V-) = G*(Vin - V-), where G is the open loop gain of the opamp.

Then: the output of the opamp is much higher than (Vin - V-), which alters the value that we wanted to store in the capacitor; moreover, the actual voltage stored is G*(V+ - V-) - Vth, where Vth is the diode voltage drop.

Why does this circuit work as expected in the text? Where am I wrong?

The open loop gain is very high, but not infinite, so there will always be a very small difference between Vin and the -Input. This very small difference is what is being amplified by the actual open loop gain G.

Also, the diode's forward voltage (Vf) is compensated for since the first op-amp increases it's output only until the -Input pin matches Vin. (The output pin of the first op-amp is really Vin + Vf).

Does this help clear things up?

I think you are thinking about things in a difficult way when you say this: -

The V- terminal of the opamp is at the same voltage as the capacitor. When Vin rises above this value, the opamp has a non-zero input, so it amplifies it.

It's the last bit that needs modifying to this: -

the opamp has a non-zero input, so its output rises to make the inputs equal

And, a new equilibrium is found.

If you take the gain as extremely high then the op-amp will drive the difference between the two inputs to vanishingly close to zero. Note that the capacitor is not connected to the output of the op-amp directly, so the output of the op-amp will have to be a diode drop above the capacitor voltage if the op-amp is to be be able to drive current into the capacitor. This will limit the maximum capacitor voltage before the op-amp saturates, but if the op-amp is operating as an op-amp the capacitor voltage will be very close to the input voltage. If it is saturated because of too-high input voltage or if the input voltage drops below the capacitor voltage then the op-amp will saturate high or low respectively.

So, in generally the capacitor voltage should follow the input so long as the input is the same or higher than the capacitor voltage at any given moment in time.

In actuality this is a bit simplified- if the op-amp has any bias current flowing out of the inputs then there is no path for it other than to gradually charge the capacitor until either the diode reverse leakage matches the bias current or the voltage approaches the op-amp supply voltage and the bias current stops flowing. If the bias current is into the input then the peak that is detected will gradually decrease over time. Also, most op-amps are not stable with a large capacitive load, so it's possible the op-amp will oscillate during the charging of the capacitor unless some complexity is added. So if you build it exactly as shown, it might not work as advertised.

You are using formulas that are largely irrelevant here when anayzing th circuit.

The golden rules of the ideal op-amp are enough : open loop gain is infinite, no current flows in or out of inputs and op-amp output does whatever it takes to keep both inputs at equal potential.

So if input voltage tries to rise above the voltage stored in the cap, the output will try to increase the capacitor voltage through the diode until capacitor voltage is equal to input voltage. And in this case when op-amp drives current from output into the capacitor through the diode, so the op-amp output voltage must obviously be one diode drop higher than the capacitor voltage. It's basically a unity gain buffer but the output is the capacitor voltage at the cathode.

Now if input voltage goes below capacitor voltage, the op-amp output also tries to make the capacitor voltage lower by trying to discharge it by pulling output voltage low, but no matter how low the op-amp output voltage goes (within limits of power supply), the diode does not conduct and capacitor cannot discharge. So capacitor voltage stays at whatever voltage it was charged to.