I'm designing a Motherboard with AMD Ryzen 7040 series APU, and I'm interested to use one of it's USBC ports (which support USB 4.0) only as USB 3.2 Gen2 x2 port.
I know that USB-C connector could be connected to two lanes:
Lane 0: (RX1+, RX1-, TX1+, TX1-) Lane 1: (RX2+, RX2-, TX2+, TX2+)
I also know that USB 4.0 supports a dual-lane configuration known as USB 4 Gen 3x2. This configuration allows for a maximum data transfer rate of 20 Gbps per lane, resulting in a total bandwidth of up to 40 Gbps when both lanes are utilized.
In addition, USB4.0 Spec also has the Alt-Mode feature. Outputting USB4 (Gen2, Gen3) or Alt-Mode through the typeC port is decided by the type of device attached and that's followed by communication between the APU and PD controller through I2C.
When a cable is connected, the CC DC-level combination will determine the plug orientation and port role, host or device. Then the host port PD will inquire about cable properties via requests using so-called SOP' and SOP" type VDF (vendor-defined) messages.
I want to know if there is a possible way to use the USB 4.0 port only as USB 3.2 Gen2 x2, where only one lane can work depending on the orientation of USB 3.2 Gen2 devices that are plugged, without the need of PD Controller, and communication of PD-Controller with the APU, and without supporting USB4.0 or Alt-Mode.
Note: this might need BIOS configuration that specifies that the two lanes of the USB4.0 port are separate USB 3.2 Gen2 lanes, where each lane works depending on the current orientation of the plugged device).
Is there any passive high-speed multiplexers with plug orientation and power control logic to select whether the SS Tx/Rx in the device go to TxRx1+/- or TxRx2+/-?
This could be a workaround for using highly expensive USB-C PD controllers, and will reduce the price of the BOM. (we already use one USB-C PD controller for the other USB-C ports).
Update: In the past, I used Vialabs VL162, which takes one port of USB 3.2 (TX1+-, RX1+-) and USB2+- connected directly to TypeC port, and outputs 2 lanes of USB for TypeC Connector (TX1+-, RX1+-, TX2+-, RX2+-), and VL162 handles CC negotiations.
but the idea here that I want to use two ports as input, and use them for only one typeC connector.
So I'm thinking about finding a MUX which could take one USB4.0 port from APU (TX1+-, RX1+-, TX2+-, RX2+-, USB2+-), and outputs (TX1+-, RX1+-, USB2+-), or (TX1+-, RX1+-, USB2+-) depending on USB 3.2 device plug-orientation?
This way (TX1+-, RX1+-, TX2+-, RX2+-, USB2+-) could be connected to only one type-c connector, while this way, we only use the usb3.2 capability instead of full USB4.0.