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I am trying to design a buck converter without using a controller IC. Input 32-52V output 12V, 50W.
I don't know how to get the desired duty cycle from the stable 2.5V error feedback. While it is stable (when output goes 12V). But the comparator opamp compares the triangular wave with this error value, and the duty cycle becomes for example lets say 0.25 and input is 48 it's alright. But when input changes to 32 the duty cycle is going to be 0.25 again but I need duty cycle to be 0.375.
I can't solve this problem. Do I need to change this feedback system? Thank you.
Vref=2.5V.

the circuit I built

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You circuit is overly simple to simulate a voltage-mode (VM) type of buck converter. The feedback path which contains the compensator must be of type 3, meaning 1 pole at dc, 2 zeroes and 2 poles. The crossover frequency must be selected around 3-5 times the resonant frequency of the \$LC\$ network. I recommend you take a look at my APEC 2009 seminar to gain understanding on how to compensate a converter. Failure to do it properly will lead to the instability you have observed.

Rather than using PSIM, I would recommend SIMPLIS which is truly tailored for switching converters design and optimized for ac analysis. You can consider the buck VM template, part of my ready-made templates you can freely download from my page, and the compensation is automated. The cool thing is that most of these examples work on the free demo version:

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One common issue with the simple architecture you have proposed is the lack of clamp on the error voltage. If your sawtooth swings from 0 to 2 V for instance, then you have to clamp the error voltage below 2 V unless you want to go to 100% duty ratio. You can do it at the error amp level or via a limiter as I did in the diagram. The low voltage must also be clamped above ground, unless you want to go to 0% duty ratio (skip cycle). I usually clamp between 100 mV and 1.8 V which, for a 2-V peak sawtooth limits the duty ratio between 5-90%.

Your circuitry to control the switch is ok for simulation purposes but, in reality, an integrated circuit implements a latch to avoid the classical double-pulse issue, meaning a glitch can occur on the comparator output during the transition at high current. A D-flip-flop will safely latch the turn-off order and wait for the next clock cycle to restart. Finally, the capacitor you've installed at the (-) pin of the op-amp does not have any effect considering the virtual ground there.

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  • \$\begingroup\$ It sounds like you have some things you don't like regarding PSIM, I'm curious what they are? \$\endgroup\$ Commented Jul 24, 2023 at 14:51
  • \$\begingroup\$ No, I have nothing against PSIM : ) and I used to simulate with it a few years back. However, I dislike the way it does ac analysis as you need to adjust the modulating source amplitude to prevent saturation as frequency approaches crossover. This is something fully transparent with SIMPLIS as it is automatically taken care of by the program for the best results. I would say that PSIM is found in labs or design houses dealing with hi-power inverters like motor control, traction inverters, in which physical aspects matter (e.g. torque). SIMPLIS is more for pure switching converter analysis. \$\endgroup\$ Commented Jul 24, 2023 at 15:10
  • \$\begingroup\$ Interesting regarding your comments on which industries you think PSIM generally is found in. We do DC-DC's and server mount rectifiers (among other things) and we (in the last year) just adopted PSIM into our design flow. AC analysis so far has been the most challenging aspect, I find. \$\endgroup\$ Commented Jul 24, 2023 at 15:13
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    \$\begingroup\$ My comments are based on my experience visiting power supply manufacturers world-wide and most of them were using SIMPLIS, not PSIM. Try one of my ready-made templates in ac analysis and let me know what you think, you'll be amazed by the simulation speed! \$\endgroup\$ Commented Jul 24, 2023 at 16:14

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