0
\$\begingroup\$

I am not too familiar with designing snubber circuits.

  • Can somebody sanity check the following sizing calculation for a snubber circuit?
  • Also: Is the undampened rise rime of the voltage due to the missing capacitor an issue if the absolute value stays below the critical values for the switch?

I want to switch an inductor L1 with ESR R1 with a BJT Q1. Given that I want to limit the voltage across Q1 to a safe value $$V_{Q1} = x\times V1,$$ I am looking to size R2 appropriately.

Assuming D1 has a negligible forward voltage drop, the current in the inductor should drop as: $$ I_{L1} = \frac{V1}{R1}\exp(-\frac{(R1+R2)t}{L1})$$

This means the maximum voltage across R2 is $$V_{R2} = R2 \times \frac{V1}{R1}$$

The voltage from the voltage source and across R2 add to give the voltage across Q1: $$V_{Q1} = V1+V_{R2} = V1+\frac{R2}{R1}\times V1=x\times V1$$

It follows that to limit $ V_{Q1} $ to $ x \times V1 $, R2 is to be sized as: $$R2 = (x-1)\times R1$$


Note: please ignore the model numbers for D1 and Q1. I could not find a way to remove them.

schematic

simulate this circuit – Schematic created using CircuitLab

\$\endgroup\$
2
\$\begingroup\$

Calculate the peak current flowing through L1. If you are switching at a very low frequency that peak current tends to become V1 / R1. If you are using a reasonable switching frequency, the peak current in the inductor is mainly determined by the inductor.

When the inductor is open circuited that current has to flow somewhere and this is where the diode comes in. It acts as a path for that current to flow through R2 then to the supply rail, through R1 and back to the other terminal of the inductor. Because it passes through R2 you can calculate directly what the peak voltage seen on the transistor collector is.

Is it below the max rating of the transistor - if yes (and by a decent margin (say) 70%) then the transistor will survive.

\$\endgroup\$
  • \$\begingroup\$ Thank you Andy for your explanations. Though I was hoping somebody could check that my calculations are correct. That being said, can you may be enlighten me what the consequences of not limiting the rise time of $ V_{Q1} $ with a capacitor are? Are BJTs sensitive to rapid rise times even if the absolute rise is below the max rating? \$\endgroup\$ – ARF Apr 29 '13 at 17:46
  • \$\begingroup\$ @Arik I think dv/dt problems are mainly related to mosfets where the gate-source voltage can be exceeded (due to high drain transients) and cause the device to fail. On BJT's this doesn't usually cause the same type of device failure. I wanted to suggest that switching frequency reduces the peak inductor current and not tie my answer specifically with steady state scenarios. \$\endgroup\$ – Andy aka Apr 29 '13 at 18:01

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service, privacy policy and cookie policy

Not the answer you're looking for? Browse other questions tagged or ask your own question.