I am designing a pro audio-video product that runs from a nominal 24 V 5 A off-the-shelf computer "brick" that has worldwide certifications. My customer has very little tech savvy, so I want to protect my rather expensive PCB from someone connecting a higher-voltage supply that could destroy a Class D audio amp IC and numerous op amps.
The old-school version of the crowbar OVP circuit used an SCR or a TRIAC. However, I read that modern MOSFETs are far faster.
P-channel MOSFET Q1 in the circuit is a well-known reverse-polarity protection circuit, which works very well for me. The idea here is that when Z2 gets beyond it's knee and begins to conduct, a voltage will be applied to the gate of N-channel MOSFET Q2. When that voltage reaches, Q2's turn-on threshold, Q2 switches on and "crowbars" the excessive voltage to ground. Resettable PTC fuse F21 is guaranteed to trip at 10 A max. So if the sourced current exceeds that, F21 goes high-resistance until power is removed. Ideally, the circuit is not damaged and comes up normally if a voltage below 29 VDC is applied.
I didn't have a power supply with the 10A capable of tripping F21, but I did have a 0 - 40 VDC 5 A bench supply. Slowly increasing the input voltage to the circuit, Q2 is off until I reach 29.4 VDC. Q2 abruptly comes on, and the bench power supply goes to it's current limit point - about 5.4 A. I know F21 isn't supposed to trip at this current level, but the PSMN6R7-40MLD FET that I selected, with it's max 6.7 mΩ RDS-on should only be dissipating 168 mW with that continuous current load. I figured even if the fuse doesn't open, any 100 watt-ish high voltage power supply would go into hard current limiting, and my board would be protected. Here is a data sheet link for the FET: https://assets.nexperia.com/documents/data-sheet/PSMN6R7-40MLD.pdf
Quite unexpectedly, Q2 fails under the test conditions just described. There was no package rupturing, but with power removed and the FET pulled from the circuit, Rds measures 0.09 or 0.10 Ω. Additionally, Rgs = 17.5 ohms, indicating catastrophic gate damage. 27 V Zener Z2 should have insured that Vgs never got over about 5 V, and absolute max for Vgs is +/-20 V, so I don't see how I could get have gotten gate punch-through. Does anyone have a theory on the mechanism for destruction of this MOSFET?