I am working on a project within my company that involves a relay board used to control three different motors when an external 24 V button is pressed. The existing setup works based on this principle.

Now, I have been tasked with designing a new board that maintains the current logic(instead relay to use in FET) while introducing PWM capability for one of the motors. An important requirement is that the motors should still be controllable in their default manner even if no microcontroller software is running, if the software crashes, or if the controller malfunctions. To achieve this, I've come up with a circuit design, and I'd appreciate your insights on it. Here is the sketch: enter image description here

Here's a breakdown of the proposed circuit:

  1. Input processing: The external 24 V momentary switch's signal is processed using a voltage divider before being routed to six drivers.
  2. Default mode: In normal operation (when the MCU is functional), 1OE (Output Enable) is set to low (pull-down), and 2OE is pulled up..
  3. Software control: Once the MCU software is developed, it will set 1OE to '1' and 2OE to '0', enabling the MCU to control the motors.
  4. Failsafe mechanism: To ensure failsafe operation, an external watchdog with a latch circuit is integrated. This watchdog monitors the MCU's status. If a software crash occurs, the MCU is held in reset (RST), and the outputs are set to a high-impedance state (high-z). At this point, the pull-down/pull-up configurations take over to ensure the motors remain controllable.

The motor control side involves using three different 2N3904 BJTs:

enter image description here

I have a few questions:

  1. Could you please review the attached sketch and let me know if you notice any potential issues with this design?
  2. I am aware that connecting the inputs together is feasible, but I am uncertain about how to handle the outputs in this setup. Any advice on this matter would be greatly appreciated.
  • \$\begingroup\$ What is "tree state logic?" \$\endgroup\$
    – JRE
    Aug 24, 2023 at 14:10
  • \$\begingroup\$ @JRE I think it was a typo for three state logic \$\endgroup\$ Aug 24, 2023 at 14:49
  • \$\begingroup\$ @JRE do you have any relevant comments about my questions? \$\endgroup\$
    – Knowledge
    Aug 24, 2023 at 15:36
  • 1
    \$\begingroup\$ @Knowledge: No. I asked about the "tree state logic" because it didn't make sense. I still can't make sense of your drawings or your task. \$\endgroup\$
    – JRE
    Aug 24, 2023 at 16:12

1 Answer 1

  1. If the two "MCU" signals come from a single I/O pin, and if the MCU dies and that pin goes open-circuit, the two OE inputs will be pulled to VCC/2 by the their two resistors. This is the worst possible condition for a CMOS input.

You can mitigate this condition by driving the two OE inputs with separate I/O pins.

If that is not an option and you are stuck with one pin, make the two resistors be 10x apart in value. In this way, the I/O-open-circuit condition will result in both CMOS inputs being held at either 10% or 90% of Vcc. Both of these are safe conditions, but the low option (10% Vcc) could cause a conflict at the outputs.

  1. In your first schematic there is no turn-off mechanism for the bipolar transistors. If both OE inputs are high, the transistor bases are floating.

  2. The IRF7205 has an absolute max Vgs spec of +/-20 V, and you are operating it at 24 V. Also, it is a 30 v part. While on paper this is ok in your design, in the real world it is dangerous. A common rule of thumb for long-term reliability is to operate components at 50% or less of their critical ratings. In your case, use a 50 V or 60 V part in your 24 V circuit, one that is rated for at least twice the peak load current.

  3. There is no transient suppression on the motor drive outputs of either schematic.

Moving on . . .

IF your question is about a possible signal level conflict between a uC output pin and a mux output at the input of BJT 3, then you are correct - there is one. One way to resolve this is to diode-OR the two signals into the base. This will prevent any cross-conducted currents, but it introduces a new failure mode. If either of the two input signal sources fails in a high state, that will override signals from the other, presumably undamaged, source.

UPDATE: The 74HC244 can be replaced by one zener diode.

Attached is a schematic that captures the conditions you have described. If the uC output pin is configured as open-drain, it can drive the Q3 base with PWM as shown with no circuit conflicts. The max output voltage is 0.4 V, which is low enough to assure that Q3 turns off when the uC output is low (sinking current). Also, it is rated for 8 mA, while the current through R3 is less than 1.5 mA.

There is around 10 mA of current through R4 when the button is pressed. In round numbers, that's 1 mA for each transistor and 7 mA to stabilize the zener diode. R5 assures that the transistors and uC see a consistent GND when the switch is open.

enter image description here

  • \$\begingroup\$ im sorry about that, the two OE comes from two seperate I/O pins, about the fet you are absoulotly right \$\endgroup\$
    – Knowledge
    Aug 24, 2023 at 20:57
  • \$\begingroup\$ what you think after you know that two output from MCU goes to 2 OE? it will works? about your mention , you need to remember the uC will turn off the first 1OE so the first 4 driver will be high z \$\endgroup\$
    – Knowledge
    Aug 24, 2023 at 21:39
  • \$\begingroup\$ Is there ever a time when both OE signals are high (all outputs hi-z)? Or is it always one set of outputs or the other? If it's always one or the other, then the HC244 can be eliminated, replaced by other parts. \$\endgroup\$
    – AnalogKid
    Aug 25, 2023 at 2:04
  • \$\begingroup\$ which parts can do the job? \$\endgroup\$
    – Knowledge
    Aug 25, 2023 at 10:48
  • 1
    \$\begingroup\$ Please answer this question: Is there ever a time when both OE signals are high (all outputs hi-z)? Or is it always one set of outputs or the other? \$\endgroup\$
    – AnalogKid
    Aug 25, 2023 at 13:32

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