# First order RC highpass filter input capacitance

I'm trying to find the capacitive load repreented by an RC first order highpass filter.

Intuitively, I tend to believe the load will not be the C series capacitance, since the capacitor is not being charged and discharged in every cycle. It is loaded to a constant value and stays there.

I did a simple simulation with 3 different RC filters, each with different capacitances.

As expected, after different time constants, the voltages all result in the same waveform, the input square wave with DC removed

Its the same story with current: all converge to the same waveform

Per this waveforms I conclude my reasoning is correct: after transient is extinguished, the RC filters present exactly the same load, which is just resistive. So the RC filter presents 0 capacitive load in permanent state?

If this is correct, I would like a theoretical justification, which I can not make.

• What's the current through each of the capacitors right at the point where your pulse changes from low to high, or visa versa? Have you looked? Sep 4 at 4:14
• @periblepsis it can be seen in the waveform I posted the current follows the input square wave perfectly, there are no spikes Sep 4 at 4:17
• Okay. So, what you should see is that once the capacitor settles down so that it's voltage is in equilibrium, that there is roughly speaking 5 V across it. This means 5 V across the 50 Ohm resistor. So this means 100 mA. (Or -100 mA.) Given how little time you allow (50 ns) before changing things up, you should notice that dV = dt*I/C = 50 ns*100 mA/100 nF (for example) so about 50 mV change. That's not much. The size of the capacitor is just going to reflect the peak to peak triangle voltage across the resistor. Not so? Sep 4 at 4:22
• OK that is an interesting point, probably that voltage triangle wave gives an idea of the capacitance seen by the source Sep 4 at 4:24
• Calculate the Xc impedance value at that frequency, then compare that to 50 ohms. Tell us why you don't see a difference. (You might repeat the simulation with about 319p then review the output.)
– Nedd
Sep 4 at 4:27

Ignoring for now the rising and falling edge transition time, you have three cases to worry about:

1. The 50% duty cycle pulse period is more than 10 times shorter than the RC $$\\tau\$$. In this case, the voltage across the capacitor will center around half the pulse voltage, with a simple triangle wave ripple to it. The ripple magnitude is determined by the capacitor equation. The voltage across the resistor will look like the same pulse shape, but centered around zero volts. (The capacitor is in this case a DC blocking capacitor.)
2. The 50% duty cycle pulse period is more than 10 times longer than the RC $$\\tau\$$. In this case, the voltage across the capacitor will alternate between $$\0\:\text{V}\$$ and the rail voltage and the voltage across the resistor will be mostly $$\0\:\text{V}\$$ with negative and positive going spikes at each pulse edge. The output across the resistor is about like an edge-detector.
3. Somewhere between case #1 and case #2 is a transition region and the details will require a more careful examination of the exact position between the two situations.

In your case you have three $$\\tau\$$ values: $$\\tau=50\:\Omega\cdot 10\:\text{nF}=500\:\text{ns}\$$, $$\\tau=50\:\Omega\cdot 100\:\text{nF}=5\:\mu\text{s}\$$, and $$\\tau=50\:\Omega\cdot 1\:\mu\text{F}=50\:\mu\text{s}\$$. Since your period is $$\10\:\text{ns}\$$ all of these cases are where the pulse period is more than 10 times shorter. So there really should be little difference among them, except for the magnitude of the ripple voltage across the capacitor.

Here, we'd compute $$\\Delta V=\Delta t\cdot \frac{I}{C}\$$. But $$\I=\frac{\frac12\cdot V_{_\text{CC}}}{R}=100\:\text{mA}\$$ and so it follows that $$\\Delta V=5\:\text{ns}\cdot \frac{100\:\text{mA}}{C}=\frac{500\:\text{pC}}{C}\$$. For $$\C=10\:\text{nF}\$$, find $$\\Delta V=50\:\text{mV}\$$ -- that should be peak to peak. For the two larger capacitor values you should find the smaller peak to peak values of $$\\Delta V=5\:\text{mV}\$$ and $$\\Delta V=500\:\mu\text{V}\$$.

In short, in your three cases the capacitor voltage is relatively stable and varies only a very small amount around $$\5\:\text{V}\$$.

You can work this out differently. Your frequency is $$\100\:\text{MHz}\$$ (here we ignore the odd harmonic frequencies, though they still do have an impact.) So the capacitor impedance is $$\\approx 160\:\text{m}\Omega\$$, $$\\approx 16\:\text{m}\Omega\$$ and $$\\approx 1.6\:\text{m}\Omega\$$. All of these are such low values compared to $$\R\$$ that you can see why the voltage across $$\R\$$ will still be a square wave, like the source, except with the DC bias removed.

• Great, thanks, I find the impedance argument to be the most convincing. Sep 5 at 18:45