0
\$\begingroup\$

In the application note https://www.analog.com/media/en/technical-documentation/application-notes/an149fa.pdf unwanted oscillations are said to be caused by either loop instability or other disturbances like noise.

I imagine 3 scenarios for oscillations/ringing:

Case 1: (theoretical sustained oscillations) A theoretical oscillator dwells exactly at the -1,0j instability point. This is just theory and cannot be realized as loop gain can never be made a perfectly constant -1.

Case 2: (real sustained oscillations) A real oscillator crosses regularly the -1,0j instability point held in this mode by AGC or by hitting large non-linearities. The latter may be unintentional, caused by loop instability. In the case of non-linearities the unstable output voltage would have to swing significantly in order to move the operating point and thus change the gain. So if the unstable voltage peak-to-peak value is not large enough (a few volts?), then it is not these sustained oscillations.

Case 3: (close-to-instability ringing) This is what the application note deals with. It is not a real oscillator but a loop with a poor phase/gain/modulus margin prone to ringing. The ringing is triggered regularly by some disturbance(s). As it is regular, triggered frequently and severe it does not die out fast and may look like sustained oscillation when measured.

Is the written above correct? I am mainly interested in whether the fact that the oscillating voltage amplitude is not large means it is not Case 2 (sustained oscillations) but Case 3 (ringing triggered regularly). Or is there a real-world scenario where it is Case 2 loop instability but the oscillating voltage amplitude can still be very small? I may have missed another scenario.

PS: The application note is about a SMPS but my question is about any loop instability/ringing.

\$\endgroup\$
4
  • 1
    \$\begingroup\$ There is a missing case: unrelated to the control loop itself, or outside its control authority (bandwidth/phase), such as additional filtering components. Consider this waveform from a well-compensated class D amplifier (basically a voltage-mode synchronous buck): seventransistorlabs.com/ClassD1/Images/… (Ignore the "fat" trace, the switching ripple is just relatively large here; the blip/bounce/overshoot at the leading edge is the important feature.) The bounce is due to underdamped poles of the multi-stage output filter. \$\endgroup\$ Commented Sep 12, 2023 at 16:29
  • 1
    \$\begingroup\$ About cases 1 and 2: case 1 can be seen as the cycle-averaged (or other suitable perspective) case of 2, where a stable limit cycle is found. In general, real control systems are nonlinear dynamical systems -- which is to say, chaotic systems. It can happen that, over a narrow operating range, loop gain exceeds 1 (with phase shift) and thus oscillation results, but as the amplitude increases, average loop gain decreases and so a stable limited-amplitude oscillation (limit cycle) results; this can have arbitrarily low harmonic distortion. \$\endgroup\$ Commented Sep 12, 2023 at 16:34
  • \$\begingroup\$ @Tim Williams Thanks, I was afraid the answer might be the amplitude of sustained oscillations can be arbitrarily low. So my conclusion would be that if e.g. buck output DC voltage has an AC component of even just several mV, there is no way of knowing if it is sustained oscillations or something else like regular ringing (disregarding obvious switching ripple). BTW, have you ever seen a concrete example of sustained oscillations of very low amplitudes (SMPS or other)? \$\endgroup\$
    – Hyp
    Commented Sep 13, 2023 at 10:15
  • \$\begingroup\$ There's plenty of way to know: ripple is fixed by type, filter, and load if applicable; filter dynamics don't vary with control loop compensation; etc. \$\endgroup\$ Commented Sep 13, 2023 at 16:20

2 Answers 2

1
\$\begingroup\$

That's all correct, though what constitutes a "small" signal is dependent on the individual system.

Without a thorough analysis you can't know by looking at an oscillation that it's small enough not to shift the operating point enough to move the poles as in Case 2.

Of course, in a SMPS you shouldn't confuse the output voltage ripple at the switching frequency with loop instability that would generally happen around the crossover of the control loop.

\$\endgroup\$
2
  • \$\begingroup\$ Thanks, have you ever seen a concrete example of these very small oscillations in real life? And yes, I am disregarding switching ripple in my question. \$\endgroup\$
    – Hyp
    Commented Sep 13, 2023 at 10:19
  • \$\begingroup\$ Yes, I have, during the development of a Li-Ion charger IC. There were small, small-signal oscillations on the charger output due to the Case 2 scenario. However, as you suspect it's not common. \$\endgroup\$
    – John D
    Commented Sep 13, 2023 at 15:57
0
\$\begingroup\$

The listed three cases are identical to the following classical three cases for closed-loop pole location:

  • Pole pair at the imag. axis of the s-plane
  • Pole pair (slightly) in the right half of the s-plane
  • Pole pair in the left half of the s-plane
\$\endgroup\$
2
  • \$\begingroup\$ Thanks. About case 2, wouldn't the pair keep crossing between the RHP (where loop gain is e.g. 1.1 and makes oscillations start and increase in amplitude) and the LHP (loop gain drops to e.g. 0.9 and oscillations start dying out) and this process repeats? \$\endgroup\$
    – Hyp
    Commented Sep 13, 2023 at 10:33
  • 1
    \$\begingroup\$ Yes - exactly this will be the case! That means: Case 2 is the basis for designing the loop (without the amplitude limiting effect). \$\endgroup\$
    – LvW
    Commented Sep 13, 2023 at 14:51

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service and acknowledge you have read our privacy policy.

Not the answer you're looking for? Browse other questions tagged or ask your own question.