I need a bit of debugging help with SWT81200 PLL that I am using on my custom designed PCB. I am able to configure registers through SPI communication, but the problem is that I am not able to achieve locking the PLL. All the voltages of 5 internall LDOs seem to be correct.
Link to the PLL chip: https://eu.mouser.com/ProductDetail/STMicroelectronics/STW81200TR?qs=Ok1pvOkw6%2FqLvBx%252BVW43ZA%3D%3D
As a reference clock I am using a crystal oscillator on the link bellow: https://eu.mouser.com/ProductDetail/SiTime/SiT8209AI-21-33S-100.000000X?qs=sGAEpiMZZMukHu%252BjC5l7YbKzh8ugEIuM4%252BQSOxXc7e8%3D
I have tried to measure my single ended 100 MHz reference clock with my Siglent SDS1202X-E oscilloscope and I don't see the square kind of clock but more sinusoidal clock of 100 MHz. Could this be due to limited capabilities of my probes and oscilloscope? In datasheet of the PLL it is also stated that the REF_CLKP and REF_CLKN pins should be biased to DC operating point but I don't measure any voltage on the pins when I probe it. I am using the configuration of SPI registers as it is recommended in the datasheet on page 51.
I am attaching bellow the schematics for my circuit.
What would you recommend me to check again? I can provide here measurements I would just need someone a bit more experienced with PLLs to give me some guiding recommendations.