Accessing all ram contents at the same time

Question

So I want to access all my ram contents in the same time. As in I want to store my 16 ram contents in 16 reg variables and then pass them onto some functions and then insert back into the ram. I want to do this mainly due to the calculation time will be long if I take only a single ram content per cycle and then perform calculations on it. This is my normal ram module:-

module ram(clk,rst,inbus,outbus,addr,we,load_finished);
input clk,we,rst;
input [7:0]inbus;
output reg [7:0]outbus;
input [4:0]addr;
reg[7:0]mem[0:15];
output wire load_finished;
always @(posedge clk)begin
         if(rst)begin
                for(integer i=0;i<16;i=i+1) mem[i]<=0;
                end
          else begin            
                if (we)mem[addr] <=inbus;
               else outbus<=mem[addr];      
              end       
end
assign load_finished=(we)? 0:1;
endmodule

Any help will be greatly appreciated

Answer 1

You want a register file for this, not a ram. Just declare an array of registers in your RTL, not as a separate module.

reg [7:0] regfile[0:15];