We know that the Arithmetic and Logic Unit in CPU is a hardware, it is a combinational circuit. Binary addition, for example, is very fast because it doesn't have to be microprogrammed; there is already a dedicated combinational circuit that adds two binary integers.

Theoretically speaking, is it possible to remove the circuitry in the ALU that performs arithmetic so that we have to implement arithmetic as a microprogram? If yes, how would the "Logic Unit" look like? Would it still be Turing complete?

  • \$\begingroup\$ Software would itself rely on an ALU to do arithmetic and logic, so it's not clear what your question is asking. Is it possible you're asking about microcoding (which itself still uses a physical ALU, but is the closest plausible thing I can think of)? \$\endgroup\$
    – nanofarad
    Sep 17, 2023 at 3:26
  • \$\begingroup\$ You can run an ALU in software using another CPU's ALU (this is what emulators do) but ultimately at the lowest level operations such as addition must run on some piece of hardware that is capable of performing that operation. This hardware is an ALU by definition. \$\endgroup\$ Sep 17, 2023 at 3:29
  • \$\begingroup\$ @nanofarad yes I think that's what I mean. \$\endgroup\$
    – Noob_Guy
    Sep 17, 2023 at 3:34
  • \$\begingroup\$ My question is rather if it is possible to implement binary addition as a microprogram. \$\endgroup\$
    – Noob_Guy
    Sep 17, 2023 at 3:35
  • \$\begingroup\$ I'll edit the question. I'll replace "software" with "mircoprogram". \$\endgroup\$
    – Noob_Guy
    Sep 17, 2023 at 3:36

1 Answer 1


If the microcode can contain a lookup table, then of course you can perform any function that fits within the size of your lookup table. For example, a 256 entry x 5 bit table could be used to implement 4-bit + 4-bit addition with 5-bit result. Or any other function with two 4-bit inputs and a result of 5-bits or less.

If you were implementing this in a Xilinx FPGA, for example, a 4-bit + 4-bit to 5-bit table would take 20 LUTs (5 x slice-M). For perspective, this is like 0.1% of a low end Artix-7 35-size FPGA.

The lookup table approach doesn't scale well though. Even a table taking two 8-bit operands would need 65,536 entries.

Instead of outright eliminating the ALU, you can also use a smaller ALU (like 4 bits wide for example) + micro code to implement wider instructions (8/16/32/64-bit). The tradeoff for having less ALU hardware is of course more clock cycles.

Taken to the extreme you could make a 2-bit ALU, and perform addition with carry 32 times in micro code to do a 32-bit add instruction.

  • \$\begingroup\$ oh ok, so an alternative to ALU is Lookup table.. \$\endgroup\$
    – Noob_Guy
    Sep 17, 2023 at 4:08
  • 1
    \$\begingroup\$ Nö, @Noob_Guy, that's not what was said. You just took the first technical term from a good answer, said "this must be the same as that other technical term" and ignored the answer. Don't do that. \$\endgroup\$ Sep 17, 2023 at 5:42
  • \$\begingroup\$ A bit of trivia. The IBM 1602 computer, a desk-sized 1960’s computer, worked in decimal (actually binary-coded decimal) and did addition and subtraction using a 100 digit (10x10) lookup table in main memory. This meant that it could easily be changed to do octal (base 8) math. \$\endgroup\$
    – DoxyLover
    Sep 17, 2023 at 9:41
  • \$\begingroup\$ For how you'd go about constructing larger operations out of a smaller ALU, consider the 74181, a 4-bit ALU specifically designed to be used this way. And more generally, the concept of bit slicing in general. \$\endgroup\$
    – Hearth
    Sep 18, 2023 at 2:34

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