# NAND and NOR gate, question on choice and function

I see both described in following images 1, 2 and 3. Does anyone know why image 3 has more transistors? Also, the basic advantage to using NAND or NOR gates in digital electronics?

1.

2. In the following image with diodes I'm assuming the voltage at C has two steps as current is applied to A and B. Please correct me if I'm wrong.

3. This image is the one I question compared to previous. Left is NAND and right is NOR. There are NOT gates as circles, which adds even more transistors. Why the extra transistors?

Not gate required for image 3:

In regards to using NAND vs NOR, I see the following post which explains the advantage of NAND over NOR. It says NAND has less delay. I'm assuming it's because electrons pass the top transistors in parallel for NAND, however if you compare to NOR almost identical. It says NAND has less area, however looking at this example both appear to have same area. Also, in the resistor logic example NOR appears to have one less transistor and one additional resistor. The final comment is the NAND uses transistors of similar size. I'm unsure how that comment can be made from these images.

• The RTL NAND gate you show isn't. The RTL NOR gate you show is. The first cannot be designed with standard input specifications, as shown. The second can be. Just FYI. (This complicates a useful answer, because of having to drill down into the false assumptions, first, correct and/or remove them, before moving on towards some kind of answer.) Commented Sep 18, 2023 at 5:38
• The circles in image 3 aren't additional transistors, they're just the logic designer's way of designating a FET as P-channel. I don't like that symbol for it personally. Commented Sep 18, 2023 at 14:51
• @Hearth P-channel was very helpful! Correct! Commented Sep 18, 2023 at 21:02

Does anyone know why image 3 has more transistors?

Yes.

Joking aside. The RTL and discrete diode-resistor circuits use resistors as pull-ups or pull-downs, which raise the current consumption. The CMOS circuit avoids this by switching off one of the driving sides.

Also, the basic advantage to using NAND or NOR gates in digital electronics?

There are no other simple gates in digital electronics. An inverter as such cannot operate on multiple input values. An AND or OR needs an additional inverter. A XOR is even more complex.

If you target the preference for NAND over NOR, the linked question already has the answer. There is no need for repetition.

1. In the following image with diodes I'm assuming the voltage at C has two steps as current is applied to A and B. Please correct me if I'm wrong.

You are wrong, as the input signal is coded in voltage, not in current.

The discrete diode-resistor circuits assume that the driver on one input is strong enough to pull down (or up) its input to GND (or VCC) by its own. If both inputs are pulling, they may take different currents, but in sum the same.

For example, let's say VCC is $$\5V\$$, the forward voltage of one diode is $$\0.7V\$$, and the resistor is $$\1k\Omega\$$. If only one diode is conducting and pulling towards its rail, the current through the resistor is $$\I_R = {5V - 0.7V \over 1k\Omega} = 4.3mA\$$. The driving input needs to source or sink this current.

Now when both diodes are conducting, the corner case can have one diode with a clearly lower forward voltage. This one will source/sink all the current. In a theoretical ideal case both diodes have the same forward voltage, then each of them gets 50% of the current. The reality is somewhere in between.

1. [...] There are NOT gates as circles, which adds even more transistors. Why the extra transistors?

Your assumption is wrong. The circles are NOT inverters by additional transistors. They mark the function of that transistor.

In regards to using NAND vs NOR, I see the following post which explains the advantage of NAND over NOR. It says NAND has less delay. I'm assuming it's because electrons pass the top transistors in parallel for NAND, however if you compare to NOR almost identical.

The answer explains that the delay depends on the relative size, which is smaller for the NAND.

It says NAND has less area, however looking at this example both appear to have same area.

Again, no. The sum of the relative numbers is 8 for the NAND and 10 for the NOR.

Also, in the resistor logic example NOR appears to have one less transistor and one additional resistor.

No. Both gates use 4 transistors each and no resistor.

The final comment is the NAND uses transistors of similar size. I'm unsure how that comment can be made from these images.

It can because the numbers at each transistor of the NAND are all "2". The NOR in contrast has 2 transistors with "4" and two transistors with "1".

• I'm still unclear on the RTL transistor and resistor count (not the MOFSET). For RTL the NAND it appears there are 2 transistors, 3 resistors. RTL NOR, 1 transistor and 4 resistors pictured. In the diode example, circuit component count appears the same NAND and NOT. Commented Sep 18, 2023 at 21:13
• Finally, for the linked post you and I provide, I think I'm confused by the MOFSET schematic figures for the transistors and logical count for each. Looking closer on the left NAND image there are 2 circles for each 2 of the top MOFSETs. Are they each n-p-n? Then below, there is one circle for each MOFSET. Are they each p-n-p? For right side NOR, I see top two MOFSETs with only one circle. Are they both n-p-n? Then below, no circle for the two MOFSETs. Are they p-n-p? If not, what type of MOFSETs are these. Commented Sep 18, 2023 at 21:18
• @notaorb npn and pnp are types of bipolar transistor. The equivalents for MOSFETs are n-channel and p-channel. There is no such thing as an npn MOSFET. Commented Sep 19, 2023 at 0:36