Proper layout of GND

Question

When designing my PCB, I noticed that all the Ground to the whole board, was passing only from a single point, which was also through a capacitor.

Is this considered bad designed, or is it negligible? Is the capacitor in danger, as perhaps, all the currents in the board (1.5A maximum) will pass through it?

EDIT: The upper copper plane (the red color) is the Ground plane. The bottom copper plane is NOT ground. Above what you can see in this picture, a trace cuts the Ground as well. So all the Ground in the upper copper plane - the ground plane, is passed through the capacitor pad.

Answer 1

I see what you mean by, current is passing through the capacitor. Not the best. There are several places I marked with a X, where the copper is not doing anything. I rotated the cap 90 and increased the copper in that area. You should increase the size of the thermals. There is a place to set the thickness of the copper there.
Try rerouting the power trace near "pin1" to get more ground. (bottom of picture) What is "pin1"? If it is a mounting hole, connect it to ground to get more ground.

I do not use thermals. Or if I do they are much stronger.

Answer 2

When designing my PCB, I noticed that all the Ground to the whole board, was passing only from a single point, which was also through a capacitor.

That doesn't seem to be what your layout snippet shows: Your ground plane seems to be very solidly connected to your connector. So, that part is fine, I guess? Depends on what the rest of your circuitry uses as ground, but I'd assume it's the net labeled "GND", and this really is fine.

you capacitor here: That certainly isn't a good design, the capacitor has only a high-impedance path to ground. That makes it worse of a decoupling component. Generally, for large SMD components, thermal reliefs aren't necessary. You could simply make the pad's thermal relief pattern "solid" here and not get into any trouble.
If you do that, your ground plane blues are done – it's all one solid ground plane with short connections from components to it through vias.

You seem to be using the complete bottom side of your board as VCC plane. I'd probably avoid that and make it a ground plane – you generally need good ground everywhere, and VCC just in a few places (nothing wrong with filling top side with VCC in the end).

Answer 3

Yes, I would consider this bad design.

It may or may not be an actual problem depending on your application and on how much current is actually running through such spots (probably it's just a fraction of your board's total supply current).

But the voltage drop alone might be enough to disrupt the functionality of your board, e. g. offsetting the measurement of a sensitive ADC circuit. Or these spots might only heat up a little without destruction. But in your case this could reduce the life time of that capacitor. The most obvious problem are burning tracks, of course (probably not at 1.5 A).

I realize such spots can't be detected easily. The net list check of your CAD tool will have no reason to complain here, of course. You need heavy duty simulation tools to automatically detect such spots and predict how problematic they actually are.

But the minimum I would do is adding an item to your layout review checklist to increase the probability of finding such spots. Notice how there is also a bad spot next to the round trough hole pad, for example.

Also keep in mind that not only power but also signals need a return path. A messed up return path for signals could cause signal integrity and/or EMI issues.

Answer 4

While most answers deal explicitely with the current, I want to add another aspect.

With all assumptions in the comments, your circuit might look like this:

^{simulate this circuit – Schematic created using CircuitLab}

the thermals of the capacitor act als inductors. For small signal analysis GND and Vcc can be seen as one node, however we don't know how far your "real" supply is away from your board and what's its impedance is. So I replaced it by Lsource (mostly for the cables) and Rsource.

Cp1 and Cp2 are the capacitances of the two ground planes vs. the VCC plane. C6 seems to be an electrolytic capacitor so it's impedance may be rather high due to long leads and internal resistance. The whole LC network will see your circuit as a small signal high frequency source, which I depicted on the right. Outcome depends strongly on the sizes and value of parasitic elements. It may lead to ringing on your power supply, or even break your EMC concept, because that construct can even act as an antenna.

You should take some serious redesing into consideration. At least do thorough EMC testing with your first prototypes.