The simple point I'm trying to make for an essay Im writing. I'm completely at a loss as to how to answer this. Any help available? Sorry, I know this is not a well formed question but I've got no other places I know of to ask left.
closed as not a real question by Keelan, Nick Alexeev♦, Dave Tweed♦, Olin Lathrop, Brian Carlton May 6 '13 at 15:48
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von Neumann's cycle, fetching, decoding and executing (sometimes a separate writeback) cannot be done in a single clock cycle. That is probably what you are referring to.
What is happening is a technique called 'pipelining'. While one instruction is executed, a second one is decoded and a third one is fetched from memory. All three in parallel during the same clock cycle. A single instruction still takes 3 clock cycles, but the parallel mechanism averages to 1 cycle per instruction.
Some instructions like branches/jumps take disproportionate many clock cycles (3 or 3) because they break the pipeline. The instructions being decoded and fetched have to be flushed and the pipeline has to reload.
Some modern processors are even more optimized than this. They can predict what will happen and hence the technique is called 'branch prediction'.