1
\$\begingroup\$

There is a circuit taken from the presentation below.

Suppose at some point the VFM voltage rises from V0 to V0 + 0.01 V so V_minus of the op-amp rises too. So what causes the voltage on VFM to return to V0?

https://cgit.osmocom.org/osmo-small-hardware/plain/yang/doc/yig_and_yang.pdf

enter image description here

\$\endgroup\$
2
  • \$\begingroup\$ The change in the supply currents for the opamp does the sensing work, altering the bjt vbes. \$\endgroup\$ Oct 1, 2023 at 17:56
  • \$\begingroup\$ You can find uses not entirely unlike this here and here for example. \$\endgroup\$ Oct 1, 2023 at 18:15

2 Answers 2

1
\$\begingroup\$

The internal circuitry of the op amp.

If V_minus rises above V_plus then there would be a difference voltage between the op amp's inputs which drives the input and causes the op amp's internal circuitry to act in a way which would drive the op amp's output (Vop) downwards.

This is negative feedback in action.

\$\endgroup\$
2
  • \$\begingroup\$ Hello user350400,to whatBIAS state i need to put the NPN and PNP ,there is forward active or saturation.What state do you think the NPN and PNP are operating in? Thanks. \$\endgroup\$
    – lub2354
    Oct 1, 2023 at 18:50
  • 1
    \$\begingroup\$ @lub2354 That's a different question. Please ask a separate question to try and obtain answers to that. \$\endgroup\$
    – user350400
    Oct 1, 2023 at 19:05
1
\$\begingroup\$

There is no "V0" on your drawing, so the question is not clear.

Consider this -

If we call Vfm the "output" voltage of the circuit, then the overall circuit is a non-inverting voltage amplifier. The unknown stuff to the left is the input voltage, Vfm is the output voltage, R4 + L1 form the series impedance of a negative feedback loop, and R2 is the shunt impedance.

At DC, L1 is simply a resistance in series with R4. With these values, you can calculate the circuit gain at DC. If Vin is steady at a non-zero value, the output will be greater than Vin and steady. After being attenuated by the feedback loop components, the voltage at the inverting input (what you call V_minus) will equal Vin, and neither will be 0 V.

\$\endgroup\$
1
  • \$\begingroup\$ Hello AnalogKid,to what BIAS state i need to put the NPN and PNP ,there is forward active or saturation.What state do you think the NPN and PNP are operating in? Thanks. \$\endgroup\$
    – lub2354
    Oct 1, 2023 at 18:51

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service and acknowledge you have read our privacy policy.

Not the answer you're looking for? Browse other questions tagged or ask your own question.