I have problem with this erorrs, but i don't know how to fix it.
[![enter image description here][3]][3]
But I have this erorrs, what should i do know?
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You get this error, because the board setup says, that the minimal allowed annular ring width is 3,94 mils. You are using vias, whose annular ring widths are smaller than that. Namely 2,95 mils.
To solve your problem in a meaningful way (instead of ignoring the drc errors), you either have to increase the minimal annular ring width in your board setup or increase the annular ring width of your vias. It depends on the requirements of you board, which of those two options you should choose.
To enter the board setup and change the minimum anullar ring size, I have attached an image below, where you find the setting. I use mm, instead of mils, so don't be confused.
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\$\begingroup\$ @ВизантијаИсток no problems. pls mark as solved, if it resolved the issue for you :) \$\endgroup\$– EeEmDeeOct 1 at 20:03
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\$\begingroup\$ @ВизантијаИсток for your other concerns: Yes, you do the same for the drill width. The edge cut layer is the outline of your pcb. you have to select the layer on the right and draw the outline of your board. then the error will dissapear. \$\endgroup\$– EeEmDeeOct 1 at 20:06
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1\$\begingroup\$ @ВизантијаИсток on the right you have the layers overview. there you select edge.cuts layer. then, for example, you take the rectangle drawing tool and draw a rectangle (on the edge.cuts layer) around your whole pcb. \$\endgroup\$– EeEmDeeOct 1 at 20:20
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1\$\begingroup\$ @ВизантијаИсток You should set these settings based on the capabilities of your fab (including any derating), and then the DRC will tell you if you are designing something that your fab can't handle. \$\endgroup\$ Oct 2 at 1:24