first let me define glitches as i understand it and correct me if i"am mistaken. glitches are the propagation of unstable signal through the system it happens when one of the operand arrive to computational block(adder for example) before the other operand .

ok , so we use a pipe-lined architecture (putting synchronous registers or latches between every combinatorial block between an adder and a multiplier ) to avoid glitches an propagate only stable results .the other advantage of pipe lined architecture is to reduce the critical path.

well am working on a low frequency project 30khz so delay is not an issue and the period of a clock is moooore than enough to perform all four operations .

the problem that latches or register are area and power consuming .

i would like to know if the it is a good choice to eliminate the registers between each block. and if am going to loose the power consumption i save from register on glitches


It's a very unusual low-speed design, and I suspect that you're going to have to address these concerns by simulating different implementations and measuring the power used by the simulation.

I would have thought that the low clock frequency also means the maximum number of glitches possible per second is very small, so your power consumption will be dominated by leakage, and therefore you should use the non-pipelined implementation.

This paper describes a technique for glitch minimisation by matching delay. That could equally be applied to CMOS implementation.

It might be viable to apply a set of test vectors to the circuit (after layout!), instrument it with glitch detectors, and hand-fix the most important areas.

  • \$\begingroup\$ thank you for your respond. indeed the leakage power is five time the dynamic power this is do to the fact that i'am using shift registers . i will try to use the multi thresholding technique to reduce the leakege power consumption . the paper you recommend present a glitch filtering technique for fpga . is it the same for an ASIC design \$\endgroup\$
    – me too
    May 8 '13 at 18:02

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