BJT Differential Amplifier-Long Tailed Pair

I am trying to solve this assignment

Consider this schematic (the BJT's are in the effective area, with $\beta=200$ so as to $i_e\approx i_c$). Also $R_1>>R_E+r_e$.

1. Define the common and differential gains, A_c and A_d respectively, aw well as the common mode rejection ratio.
2. Choose the resistors $R_1,\;R_E$ so as the differential amplifier in a differential signal $100\mu V$ would reject noise of $1mV$ amplitude in a factor $10^{-2}$.

I've managed to solve the first question and the results are

$A_d=1-\dfrac{v_{CC}}{2v_1}$

$A_c=-\dfrac{v_{CC}}{v_1}$

$CMRR=\left|\dfrac{v_1}{v_{CC}}-\dfrac{1}{2}\right|$

The thing is that I have no idea on the second one. I just need an idea or an advice ;)

EDIT

I saw in the Art of electronics, p.:99 that the correct expressions are

1. $G_{diff}=\dfrac{R_C}{2(R_E+r_e)}$
2. $G_{cm}=-\dfrac{R_C}{2R_1+R_E+r_e}$
3. $CMRR\approx\dfrac{R_1}{R_E+r_e}$

As it seems miscalculated what was asked in the first question

• Bad English in homework. I cannot decipher the meaning of 2. Why is the signal level relevant for noise rejection? Or even the noise level? Is this trying to say "Choose RE and R1 for $10^-2$ (-40 dB) noise rejection?" And is that common mode noise or power supply noise? Probably common mode, going by the reference to it in 1. But it should be clear. The homework problem writer fails here. – Kaz May 7 '13 at 20:59
• @Kaz: Thank you very much for your comment! That was the reason for asking! I'm not able to understand what does the second question imply... I'm glad that I'm not the only one in the world! – Thanos May 8 '13 at 8:14

Differential gain:

If the base of Q1 moves down by $-\Delta V_{be}$, and the base of Q2 moves up by $\Delta V_{be}$, then the junction of $R_1$ and the two emitter resistors $R_e$ will remain fixed. Since no signal current flows through $R_1$, the signal current through Q2 will be simply

$\frac{\Delta V_{be}\ - (-\Delta V_{be})}{2R_e}\ = \frac{V_{diff}}{2R_e}$.

The voltage gain will then be

$\frac{V_o}{V_{diff}} = -\frac{R_c}{2R_e}\$.

Common mode gain:

The simplest way to calculate this is to note that $R_1$ will carry both $I_2$ and $I_2$, and these currents will be equal in magnitude. It's therefore possible to split resistor $R_1$ for analysis purposes into two resistors equal to $2R_1$ in each leg of the pair and break the center connection. Then from inspection the common mode gain is:

$\frac{V_o}{V_{CM}} = \frac{-R_c}{R_e + 2R_1}$.

The common mode rejection ratio is the differential gain divided by the common mode gain, or:

$\frac{\frac{R_c}{2R_e}}{\frac{R_c}{R_e + 2R_1}}$

or:

$\frac {R_e + 2R_1}{2R_e} \approx \frac{R_1}{R_e}$.

• Thank you very much for your answer! More answers lead to more questions... For the differential gain:Why the $R_1$ junction and the two $R_E$ will remain fixed and why there is no signal current through $R_1$? Where does the factor of two comes from? I suuposse you just used KVL from Collector 1 to $output$... If so where is the $V_{CC}$? – Thanos May 8 '13 at 8:21
• Common mode gain:Why in this case these is signal current through $R_1$? You result looks like a voltage devider, but I'm not able to see it... Sorry... :( – Thanos May 8 '13 at 8:27
• UPDATE DIFF MODE: I now understand why there is no signal current(I didn't pay any attention to the word signal) through $R_1$! As for the current through $Q_2$, I assume you regard $Q_2$ as a black box, without impedance;that's why there is the factor of $2$ there, because the current between the transistors passes through the two $R_E's$, right? If the transistors had impedance I supposse that your denominator would be $2(R_E+r)$, isn't that right? – Thanos May 8 '13 at 11:46
• But I still don't get how the differential gain is derived... It seems to me that you may be using $i_c\approx i_e$... If so, I can't see why the $v_{cc}$ is missing... – Thanos May 8 '13 at 12:01

protected by W5VO♦May 7 '13 at 21:41

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