# SPICE (Spectre) "ideal" capacitive divider behavior

I decided to look at this after seeing this post, although I think they're not the same so making a separate question. I wanted to check what would happen in SPICE (this happens to be Spectre) if I tried to make an ideal 1/3 capacitor divider as seen below. I did have to include a resistor from the output to ground (SPICE will add one in if I don't in order to have a DC path to ground). I made it extremely huge so that it wouldn't interfere with the other capacitors, which in this particular example are set to 1u. All these components are from the Cadence analoglib library, so they are meant to be very ideal (as far as I know).

What I'm specifically wondering about is the transition from 0 gain to the ideal, expected gain of 1/3. For a "truly ideal" capacitor divider with no components besides C0 and C1, the transfer function is

$$H(s)=\frac{C_0}{C_0+C_1}$$

and is completely frequency independent, again here equal to 1/3. However in simulation, there is a point where the gain transitions from 0 (which would make sense if truly at DC) to 1/3. I observe that this transition point moves to lower frequencies as C increases. R0 doesn't appear to affect it either which is intended since I made it very large to avoid interfering with the capacitive divider (again it's just there for the DC convergence).

How is this transition point being determined? Clearly the transfer function I wrote above isn't physical, and as a result it has no way to predict where this transition point could happen. I'm guessing that SPICE is putting in some other components in the background that aren't immediately clear. Even at these extremely low frequencies, the impedance of C1 should be much less than that of R0 and so their parallel combination should just reduce to C1.

• A pure cutset of capacitors in a circuit graph is invalid -- caused in your case by a floating node lacking a DC path to ground. I believe at one time this caused an error message to be generated in old Spice programs. But I think this has been remedied either by the use of gshunt in the .options card or by special methods implemented by a variety of different authors. There's likely to be differences in behavior between .TRAN with and without the UIC option added, too. Spice programs also are not charge conserving. In general, I'd say whatever you see is idiosyncratic to the program you use. Oct 22, 2023 at 6:25
• Adding the large resistor, of course, fixes the cutset problem. But I'm not sure about numerical issues within the Spice program and suspect that there will be dynamic range problems using floating point unless the author goes to extreme lengths to handle them. Oct 22, 2023 at 6:29
• Theoretically, you should also add a resistor across the first capacitor, and the individual products Ri*Ci should be the same. Oct 22, 2023 at 6:40
• Compare GMIN, RSHUNT parameters. Probably CHGTOL and ABSTOL too. Note that most SPICEs use single precision so your 1e100 resistor is an open circuit (maybe Spectre doesn't, I don't know). Oct 22, 2023 at 11:48
• I agree with @TimWilliams. It's likely your unrealistic resistor is effectively being thrown out and replaced with one that's equal to 1/GMIN. You can play around with .options GMIN=x to validate this. Oct 23, 2023 at 13:55