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This question is specifically about PCB layout for high speed memory interface: DDR3, DDR4, DDR5. I can see that often people would use microvias for high speed interfaces. The board I have seen was for DDR3. Microvia basically links to two layers but we can stack them to cover more layers vertically.

Now I also know that, if we use a through hole via, it will have a stub since we will be connecting signals between top/bottom and an internal layer. The unused portion of the via becomes stub and reflects signals back. This can cause signal integrity problems.

Now the primary question in my mind is if we can still create a PCB with high speed interface while only using through hole vias. Is this possible?

Lets say we don't want to use micro-vias. Then we can rely on backdrilled, blind or burried vias for high speed memory interfaces? I found that many manufacturers will not manufacture anything other than plated through hole vias i.e no microvia, no blind via, no burried via and no back drilling even. This is why this question has arisen.

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Actually this might be more general question, because it really does not matter what the stub is, a part of via or other structure.

A via, or even a part of it, is a transmission line. It carries a signal. Because it is a piece of conductor, it has some stray inductance. Because the conductor is insulated from other conductors by some distance in some dielectric, it has stray capacitance. So it effectively has some characteristic impedance, and the unterminated part of a transmission line is left open, so signals traveling at some velocity in the transmission line will get reflected back from the open end.

Now how much the signal reflects back depends on the stub length and the slew rate of the signal pulse.

How much the reflected signal is allowed to degrade the actual signal depends on what signal is it and how it is received.

There are tools that calculate these for you. There are tools that take in your PCB design and signal parameters and simulate using the 3D model of the PCB. Simpler calculators just roughly calculate using simpler equations that are approximated from the 3D field solver results.

And that's how some application notes can approximate you how many vias you are allowed to put on the bus. Which also means it is best to avoid vias and second best is to go only between top and bottom layers for vias.

If you intend to do some high speed stuff properly, you would need simulation software or measuring equipment that costs more than a car to be able to validate your design.

For example, USB 3 goes at a rate of 10 Gbps, and since it is a digital square wave signal, 10 GHz of bandwidth is not enough, as one rule of thumb is that you need at least 5th harmonic for a square wave to look like a square wave so analog bandwidth of 30 GHz is not enough, you need 50 GHz.

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