Critical approach to RF amplifier

Question

This is a 20 MHz RF amplifier circuit below. I believe that it will work. It consists of a pre-amplifier and an emitter follower, which I had calculated once. I am complete beginner in electronics. Do you have any suggestions about how it could or would work, otherwise? I got good results in LTspice, but would it work in reality, too? If so, I will solder the components together with relief.

Edit:

I measured the voltage of antenna. It results as 0.65V, which might affect the gain to negative. I decided to add a voltage divider to circuit. R3 resistor can be a variable one, which boosts the gain to a much higher level. Below is the circuit.

Update:

I updated the voltage divider resistors to less ones and the transistors to 2n3904. I got more power.

Answer 1

Will it work?
Not as you expect - there are problems:

• No bypass capacitor from +12V to GND (always add one as close to amplifier as possible)
• Input impedance is extremely low
• Why is emitter follower output coupled to GND with 1nf capacitor??
• antenna input and antenna output invites coupling...which may result in oscillation.
• gain is dropping off at 20 MHz. A small peaking coil might be added in series with R5.

Your simulation drives the amplifier input with a signal source having zero source resistance - very unfair. This gives very unrealistic gain - any real signal source will have finite input resistance (perhaps 50 ohms?) and possibly some reactance too. Try adding a 50 ohm source resistance to V3 and see how things deteriorate.
My LTspice run shows Q2 amplifier input impedance near 2 ohm at 20 MHz: this will load down most sources: a big mis-match that eats up any gain the transistor has. That 4400 ohm shunt feedback is the cause of such low amplifier input Z.

Q2 will run fairly warm. Its 83 mA collector current is quite high. Absolute maximum rating for collector current is 100mA - you're close to that limit. Current-gain bandwidth product for that transistor peaks at 30 mA. You might want to bias Q2 there. Decrease shunt feedback so that input impedance goes up. Gain will go up too. Gain expectations are not stated.

C1 (1nf) shunts output signal to GND. Can you justify its purpose? - I see none. What load resistance is to be driven? Include it in your simulation.
Suppose Q1 drives a 50 ohm load. Biasing of Q1 is very reasonable. It should add very little distortion to a 1mW signal delivered to a 50 ohm load.