I am designing the following circuit shown in the atached image. It is a wheatsone bridge with the differential output attached to voltage followers on each terminal and then connected to a single amplifier with a gain of 10. In LTSpice simulation it works as expected. When building the circuit physically on a breadboard, the wheatstone bridge differential output is the 205mV as expected, but when it is connected to the rest of the circuit the differential output drops down to around 100mV for both the bridge's differential output Vo+ - Vo- and for the buffer outputs V1-V2.
What could be causing this? The opamps used are UA741CM