I'm a computer science student who's trying to get a better understanding of the d flip-flop. My project assignment is to make a CMOS design of a positive edged d flip-flop using ff master slave and include inputs preset and clear. My class mostly just goes over basic logic designs, so I tried searching this design online, but I wouldn't find exactly what I need. For example, the image below from a chegg question is apparently a negative edged d flip-flop, which is not exactly what I need. https://www.chegg.com/homework-help/questions-and-answers/consider-falling-edge-d-flip-flop-asynchronous-clear-input-let-resetn-clear-input-vhdl-cod-q33499098
The next image below is a positive edge d flip-flop but without preset and clear from electronicshub.org https://www.electronicshub.org/d-flip-flop/
I noticed that in the first image, the input D is connected to an inverter, making the 2 images slightly different.
I am aware there is a Dual D flip-flop shown below from Wikipedia, but I don't believe that is the design I'm supposed to use since this requires 3 latches https://en.wikipedia.org//wiki/Flip-flop_(electronics)#Dual-edge-triggered_D_flip-flop
Is there a resource or a picture of, specifically a positive edge triggered, master slave d flip-flop with preset and clear?
Thank you in advance.