2
\$\begingroup\$

I'm a computer science student who's trying to get a better understanding of the d flip-flop. My project assignment is to make a CMOS design of a positive edged d flip-flop using ff master slave and include inputs preset and clear. My class mostly just goes over basic logic designs, so I tried searching this design online, but I wouldn't find exactly what I need. For example, the image below from a chegg question is apparently a negative edged d flip-flop, which is not exactly what I need. https://www.chegg.com/homework-help/questions-and-answers/consider-falling-edge-d-flip-flop-asynchronous-clear-input-let-resetn-clear-input-vhdl-cod-q33499098 enter image description here

The next image below is a positive edge d flip-flop but without preset and clear from electronicshub.org https://www.electronicshub.org/d-flip-flop/

I noticed that in the first image, the input D is connected to an inverter, making the 2 images slightly different.

I am aware there is a Dual D flip-flop shown below from Wikipedia, but I don't believe that is the design I'm supposed to use since this requires 3 latches https://en.wikipedia.org//wiki/Flip-flop_(electronics)#Dual-edge-triggered_D_flip-flop enter image description here

Is there a resource or a picture of, specifically a positive edge triggered, master slave d flip-flop with preset and clear?

Thank you in advance.

\$\endgroup\$
0

1 Answer 1

1
\$\begingroup\$

I am aware there is a Dual D flip-flop shown below from Wikipedia, but I don't believe that is the design I'm supposed to use since this requires 3 latches ...

Is there a resource or a picture of, specifically a positive edge triggered, master slave d flip-flop with preset and clear?

You can be sure of this. The last picture is the schematic of a 74LS74 (or nearest).

My project assignment is to make a CMOS design of a positive edged d flip-flop using ff master slave and include inputs preset and clear.

Perhaps just make the CMOS version, CD4013, with "transmission gates" (reset and preset are inverted).

\$\endgroup\$
3
  • \$\begingroup\$ I just checked the logic diagram of the CD4013 and it seems to be fine. For clarification, the clock (cl) are only inputs of the transmission Gates in the diagram? My second question is that my professor had just mentioned to me that this flip flop can be done exclusively with nand gates, are you aware of that design? \$\endgroup\$ Commented Nov 6, 2023 at 18:05
  • \$\begingroup\$ With NAND gates, it is the 74LS74 or similar. \$\endgroup\$
    – Antonio51
    Commented Nov 6, 2023 at 18:09
  • \$\begingroup\$ The circuit provided is a D-type latch. For it to work as an edge-triggered flip-flop you must connect a transition detector to the clock input. \$\endgroup\$
    – Franc
    Commented Nov 9, 2023 at 9:19

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service and acknowledge you have read our privacy policy.

Not the answer you're looking for? Browse other questions tagged or ask your own question.