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Lets say we have instructions like:

bne r1 $0 loop
sw r2 0(r1)

Let's say we go ahead with the taken path, i.e., execute the sw instruction after bne assuming the branch is Not Taken. On a branch misprediction (bne turns out to be Not Taken), how do we update the data memory/ cache with the correct value because sw was not supposed to be executed and change the values in memory and corrupt it? I am asking this question concerning both an R10K/P6 OOO core and a simple 5-stage pipeline core.

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    \$\begingroup\$ en.wikipedia.org/wiki/Pipeline_stall For most software, reads are more common than writes. \$\endgroup\$
    – Mattman944
    Commented Nov 11, 2023 at 9:37
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    \$\begingroup\$ A key feature of branch prediction is that you need to have a mechanism that allows you to defer committing (to registers or memory) the results of any speculative operations until you actually know the result of the branch. \$\endgroup\$
    – Dave Tweed
    Commented Nov 11, 2023 at 13:45

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