# Calculations of mesh and nodal analysis of my dc circuit doesnt satisfy any of the KVL or KCL conditions

So I'm working on a course project under my professor and I seem to have encountered a huge problem.

I built my own circuit and solved it using mesh and nodal analysis in MATLAB, got some values but the issue is that neither of mesh or nodal conditions satisfy when I try to verify the values theoretically.

Here are my mesh analysis equations and values:

Circuit Diagram:

Loop 1 equation:

=> V1 – VR1 – VR2 = 0

=> 15 – 50I1 – 150(I1-I2) = 0

=> 15 – 50I1 – 150I1 + 150I2 = 0

=> 15 – 200I1 + 150I2 = 0

=> -200I1 + 150I2 = -15

=> 200I1 – 150I2 = 15

Loop 2 equation:

=> VR2 – VR3 – VR4 = 0

=> 150(I1 - I2) – 100I2 – 50(I2-I3) = 0

=> 150I1 – 150I2 – 100I2 – 50I2 – 50I3 = 0

=> 150I1 – 300I2 – 50I3 = 0

Loop 3 equation

=> VR4 – VR5 – V3 = 0

=> 50(I2-I3) – 200I3 – 40 = 0

=> 50I2 – 50I3 – 200I3 = 40

=> 50I2 – 250I3 = 40

Values that I obtained from MATLAB program

I1 = 0.14A

I2 = 0.09A

I3 = -0.14A

Finding values of voltage drops across resistors

VR1 = 50I1 = 50 x 0.14 = 7V

VR2 = 150(I1-I2) = 150 (0.14-0.09) = 150 x 0.05 = 7.5V

VR3 = 100I2 = 100 x 0.09 = 9V

VR4 = 50(I2-I3) = 50 (0.09 + 0.14) = 50 x 0.23 = 11.5V

VR5 = 200I3 = 200 x -0.14 = -28V

Verification (i) Verifying Loop 1

=> V1 – VR1 – VR2 = 0

=> 15 – 7 – 7.5 = 0

=> 15 – 14.5 = 0

=> 0.5

(ii) Verifying Loop 2

=> VR2 – VR3 – VR4 = 0

=> 7.5 – 9.5 – 11.5 = 0

=> 13.5

(iii) Verifying Loop 3

=> VR4 – VR5 – V2 = 0

=> 11.5 + 28 – 40 = 0

=> 0.5 ~ 0

Nodal Analysis

Circuit Diagram

Equation for Node 1

=> I1 – I2 – I3 = 0

=> (15-V1)/50 - V1/150 - (V1-V2)/100 = 0

=> (90-6V1-2V1-3V1+3V2)/300 = 0

=> 90 – 6V1 – 2V1 – 3V1 + 3V2 = 0

=> -11V1 +3V2 = -90

=> 11V1 – 3V2 = 90

Equation for node 2

=> I4 - I6 + I5 = 0

=> (V1-V2)/100 - V2/(50 ) + (40-V2)/200 = 0

=> (2V1-2V2-4V2-40+V2)/200 = 0

=> 2V1 – 2V2 – 4V2 + V2 = 40

=> 2V1 – 5V2 = 40

Values obtained from MATLAB program

Node Voltage V1 = 6.73V

Node Voltage V2 = -5.30V

Finding Currents across the Circuit

I1 = (15-V1)/50 = (15-6.73)/50 = 8.27/50 = 0.16A

I2 = (V1-V2)/100 = (6.73+5.30)/100 = 12.03/100 = 0.12A

I3 = V1/150 = 6.73/150 = 0.04A

I4 = (V1-V2)/100 = (6.73+5.30)/100 = 12.03/100 = 0.12A

I5 = (40-V2)/200 = (40+5.30)/200 = 45.30/200 = 0.2A

I6 = V2/50 = (-5.30)/50 = -0.1A

Verification Verification at Node 1:

=> I1 – I2 – I3 = 0

=> 0.16 – 0.12 – 0.04 = 0

=> 0

Verified at Node 1

Verification at Node 2:

=> I4 - I6 + I5 = 0

=> 0.12 – (-0.1) + 0.2

=> 0.5

The issue here is that only one equation out of both KVL and KCL satisfies the condition. I just can't understand what went wrong and why I can't get a zero in all of the equations.

I know this is a big question but this is my course project and I need to finish it before my finals.

• I wrote you earlier about nodal where you don't need to make a decision about current directions. Anyway, here's the above schematic redrawn two ways, once for each method. Nov 12, 2023 at 0:53

In your LOOP 2 equation 3rd line it should be +50I3 at the end of the LHS of the equation. You need to multiply throughout by the negative outside the bracket in the previous line.

In the equation for Node 2, the 40 and V2 appear to have incorrectly changed sign between lines 2 & 3.

• Still, I only get 1 loop verified out of 3 and 1 node verified out of 2 Nov 12, 2023 at 4:23
• @SpaciousCoder78 Part of the benefit of doing a project like that is to improve your analytical skills and train yourself up in the process, it's all part of your education. You need to very carefully work through all the algebra, (again and again if necessary), locate and iron-out your errors. Sorry if that sounds a little harsh but that is the best way to derive the most benefit. As a result of doing that you will improve your abilities and gain a sense of achievement and greater self confidence when you finally achieve your goals.
– user350400
Nov 12, 2023 at 11:06
• I could give it more time if I had more time. The issue is that I have my finals next month and I'm supposed to finish this project and submit it very soon. It's just a time constraint but again, I'll go through my calculations for the 6th time. I'll also consult my professor for help. Nov 12, 2023 at 12:41

Maple sheet (i1, i2, i3 are your "circulating" currents, first diagram).

Made also using Thevenin 2 times. R3 is "external" resistor).

You have another alternative way for finding voltages and currents.

Made with microcap v12 (first brut circuit, then applying Thevenin 2 times).

For KCL, always draw all current directions either entering the node or leaving the node. This will always work, if the current determined later is negative, then the actual direction is opposite the arrow.

My third example isn't mathematically wrong, but it is more prone to errors. This is basically what you did.

For node equation 2, you have the sign wrong on I5.

simulate this circuit – Schematic created using CircuitLab

Analysis of the given circuit with various methods.