I can tell what I know:
- calculate trace width, use more with some margin and excess for power ones
** switching nodes need thicker traces to avoid parasitic inductance and elements must be close to avoid parasitics
- Important is to use the rule of thumb for the gap between HV traces, not sure about the value and I will not post it for safety reasons and responsibility concern
- watch for parasitic capacitances too (i feel this is less important in most cases)
In other words, when you design layout you should focus on parasitics and responsibility, safety
Divided in groups, I get:
responsibility:
- the gap between HV traces
- the trace width
parasitics:
- trace inductance
- capacitance between traces
- differential pairs for diff signals
- impedance matched and terminated transmission lines for cables
- use polygon unless application needs to not use
I dont know if i know everything but at least this is a good starting point for beginner, I succeeded to make some good boards using these.
One of them was a complex system with HV and different communications and linux system on module and all worked. I had issues only with the ethernet but it wasnt the layout.
When you have IC for example, you can use a short thin trace from a pin to longer thick trace, this is common practice
Recently I found a good article about this, you can search for example "boost converter layout"
There are many good pdfs from manufacturers there
They are many things in layout design, I cant remember everything at the moment and missed some.
Sometimes good to use vias, some times bad
Your learn flow will tell you piece by piece, I told you the basics of safety first and performance sweetness