# SIMPLIS - Buck CM from C. Basso Website

I took from the website of Christophe Basso a simplis simulation. I have some questions about it to be sure to understand it. Here is the schematic of the simulation:

It is a current mode buck converter. I do not understand the purple parts: R4, C2, R7 and the gain G2. Are those values are here to simulated a particular IC? In particular the transfer function of the op amp integrated into the IC? Like the one above (link to the datasheet):

Would it be possible to simplify the schematic like this:

Thank you,

• Calling @VerbalKint. Commented Nov 16, 2023 at 15:23
• @winny Title does already :) Commented Nov 16, 2023 at 15:25
• @winny - Just FYI, even though you can type a username into a comment, that does not mean that it sends them a notification. That username would not "autocomplete" when you typed it and that's the indication it's not a "valid" usage. Apart from a few corner-cases (e.g. notifying an editor of the post) that user would need to have written a comment before yours, on the same post (in this case, the question) before it's possible to trigger a notification by writing @their-username. More info here. Hope that's useful. Commented Nov 16, 2023 at 18:09

The circuits I provide in my 90+ ready-made templates are simplified versions of what a real controller would do. It is for clarity reasons, so that everyone can understand the operating flow, but also for coping with the limits set by the demo version. I have circled some of the blocks in the below figure:

1. The voltage-controlled current source $$\G_2\$$ together with resistor $$\R_5\$$ form a voltage divider with a ratio of 330m x 1 = 0.33, a divide-by-3 block as you can find in the UC384x circuit for instance. This block is there to force a higher operating voltage in the op-amp output for a low peak current setpoint. For instance, if the peak current has to be 5 A across a $$\100-m\Omega\$$ shunt, then you need to apply 500 mV as a voltage setpoint to the current-sense (CS) comparator input which is low for an op-amp. With this extra divider, for the same 500-mV setpoint, the op-amp output will be at 1.5 V, improving the noise immunity significantly.

2. in any current-controlled power supply, you need a maximum peak current setpoint during the start-up sequence (the loop is open until the output reaches the target) or if the loop fails (short circuit or open-circuited return path) to limit current runaway. Here, I limit the maximum setpoint to 1 V (as in a UC384x) but it could be a lower value for practical reasons (you now see 0.5 V in some ac-dc offline controllers, or much lower in low-voltage dc-dc converters). To clamp this value, I use a piece-wise linear (PWL) resistance whose current depends on the applied voltage. You describe its behavior with lines you fill out:

-100 -2p / 0 0 / 0.99 2p / 1 100

For a positive voltage below 0.99 V, the part leaks with a 2-pA current and it brutally conducts when the voltage reaches 1 V. It leaks -2 pA below -100 V. You can add as many segments you want depending on the usage.

1. this block injects slope compensation whose level is computed by the macro. The sawtooth $$\V_{saw}\$$ is buffered and adjusted in amplitude by coefficient $$\k_r\$$ and adds up to the inductor current transformed in a source by $$\F_1\$$. $$\R_4C_2\$$ form a cheap $$\RC\$$ filter which is done via an active leading-edge blanking circuit (LEB) in a real circuit. The LEB is there to blind the controller for a few hundreds of ns so that it does not react to spurious pulses when the power switch turns on. The $$\RC\$$ filter simply integrates the current information and attenuate the pulse in this simplified circuit. You can certainly omit here but it does not cost a dime to keep it ^_^

2. this op-amp is a simplified version of what is proposed in the simulator. I built this circuit that I already used in SPICE to shape the frequency response the way I need. Once the converter operates as expected, I usually replace this simple model by a more complex one or the real part. I always debug with a simple arrangement that I later improve.

The first block with $$\G_1\$$ and $$\R_{OL}\$$ build the dc gain, $$\A_{OL}=g_mR_{OL}\$$ and then a low-frequency pole is introduced at $$\f_p=\frac{1}{2\pi R_{OL}C_{OL}}\$$ and is located at 30 Hz. If you want to add a second pole, simply insert a unity buffer after $$\C_{OL}\$$ made of a current-controlled voltage source like $$\G_1\$$ (100 µA with a resistance to ground of 10 kOhms for instance) and add a capacitor of your choice across the resistance to place the second pole. The output of this extra buffer is clamped as in the original circuit.

• What would be my job without you ?
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Commented Nov 26, 2023 at 19:50