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I am interfacing a deserializer with Quectels smart module.

The CSI lines of the deserializer are connected to the CSI lines of smart module.

A common mode choke is placed in between them. The schematic given below.

enter image description here

My question is in the layout where we need to place the common mode choke, that is

near to deserializer or near to smart module and why?

EDIT:1

I received the below comment from TI application engineering team.

"Do not place CMC components on CSI-2 DPHY traces. CSI-2 transitions between single ended and differential modes continuously"

So I am going to remove the choke from CSI lines

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    \$\begingroup\$ What was the reason you chose to put them there? Was it your decision? \$\endgroup\$
    – Andy aka
    Commented Nov 22, 2023 at 16:07
  • \$\begingroup\$ It was not my decesion.Higher management decision.Without that this may fail emc testing.This is an automotive product. \$\endgroup\$
    – Confused
    Commented Nov 22, 2023 at 16:17
  • \$\begingroup\$ OK, and I dread the response to this but, what reasons have the management given for the inclusion on this part? Design by management (or committee) is usually a bad thing. \$\endgroup\$
    – Andy aka
    Commented Nov 22, 2023 at 18:51
  • \$\begingroup\$ I would worry more about impedance control, tbh. I'm sure you are aware of the importance of the impedance control on MIPI CSI data lines. \$\endgroup\$
    – Rohat Kılıç
    Commented Nov 22, 2023 at 22:50
  • \$\begingroup\$ Impossible to say. The nature of the signals is undefined (what is a CSI?). No part numbers given (I think I can make out LCFE121002A900TG on the schematic but please add in text), no route defined, no layout, no connector. \$\endgroup\$
    – Tim Williams
    Commented Nov 22, 2023 at 23:23

1 Answer 1

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I'd offer three answers

  1. Anywhere, I can't see a need for it, but if your management wants it I can't see it mattering where it goes. So place them wherever they fit most nicely. The two are probably close to each other anyway.
  2. Nearer the source if management is worried about radiated emissions. If the board is generating CM noise on these lines, it's being generated at the source (probably) so placing these close will limit the length of trace the common mode noise is present on.
  3. Nearer the sink if management is worried about conducted emissions. If CM noise is being conducted onto these lines, it makes sense to have as much of the noise behind the choke to be blocked by it

Although I'd stress putting common mode chokes onto a PCB for balanced pairs routed only within that PCB would not be anywhere on my list of strategies for reducing the likelihood of failing EMC unless testing had shown CM noise/emmisions on these pairs was a problem. I'd be far more likely to look at placing DNE components to give me options for edge-limiting, noise removal, or current limiting.

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  • \$\begingroup\$ Thank you for the detailed answer. You are correct. It is not needed. I made an edit to the question. \$\endgroup\$
    – Confused
    Commented Nov 23, 2023 at 4:24

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