Could anybody please point me some direction on where I can learn to solve simple counter problems like counting in a given sequence using a given flip-flop? For example:

Create a counter counting in a sequence 3-1-4-7-2 and again from the beginning using the D-type flip-flops

I'm not asking for help in this particular problem - rather, it'd be great to know how to solve this class of problems. I know how to design counters in a series to count from n to n+k or the reverse but how to do this thing?


2 Answers 2


Think of your special counter as a state machine. Then assign the state the coded value of the count sequence that you want. In this case the states would be as following with the next state showing.

State    Next State
  3  ->   1
  1  ->   4
  4  ->   7
  7  ->   2
  2  ->   3

Each state can be encoded into three binary bits so your design will require three D type flipflops. You need to make up a set of three karnough maps, one for each flipflop that, shows the next bit value for the flop flop (D input) based upon the three current state (Q outputs).

Use the k-maps to simplify the logic down to the minimal required. Finally you can code the minimal logic up in a series of AND gates driving OR gates into each FF D-input.

Here I show the k-map for the lowest ordered bit of the "counter" to get you started with the idea.

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  • \$\begingroup\$ Wow, that's insanely informative and easily put! Thank you so much, I get it! :) \$\endgroup\$
    – Straightfw
    May 12, 2013 at 20:21

The basic idea in these kinds of problems is that your D flip-flops represent your state and you need to create some combinational logic that takes as input the current state and generates as output the next state.

So first you create the truth table:

  input      output
D2 D1 D0 | D2' D1' D0'
 0  0  0 |  *   *   *    # actually, don't care is not quite right, see below
 0  0  1 |  1   0   0    # 1 -> 4
 0  1  0 |  0   1   1    # 2 -> 3
 0  1  1 |  0   0   1    # 3 -> 1
 1  0  0 |  1   1   1    # 4 -> 7
 1  0  1 |  *   *   *    # not quite right, see below
 1  1  0 |  *   *   *    # not quite right, see below
 1  1  1 |  0   1   0    # 7 -> 2

So now you have three functions (D2', D1', and D0') for which you have to create combinational logic. Which you can do with a Karnaugh map or whatever else you have at your disposal. (For example, you can get yourself a copy of the Espresso logic minimizer. The source code is on github. There are various precompiled versions available if you google.)


In the truth table above I said that don't cares are "not quite right." Here's why: when you first turn the power on in your circuit the D flip-flops are going to come up in some random state. So you need to make sure that your circuit somehow gets into a reasonable state. One way to do this is to make sure that some other part of your circuit asserts the correct set/reset lines on your flip-flops shortly after startup (and note that 000 is not a valid state in this case.) Another way to do it is to make sure that the "don't care" states actually (eventually) lead into valid states. (This makes your circuit more robust to transient errors as well.) So make sure that state 000 doesn't transition to state 000 (or more perversely, that you don't have transitions that cycle between invalid states, like 000->101->000.) If your logic minimization uses the don't cares to create cycles, you can break these cycles by replacing the don't cares with valid states.

Some resources to help you explore further:

Previous electronics.stackexchange questions on similar topics:


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