# Convert square wave to DC using opamps

For a project I need to convert a 0-24V 200Hz square wave to DC. The DC is supposed to represent the duty cycle of the square wave signal. From this website I drew inspiration.

I've made a 2nd order lowpass filter to convert a square wave 24V 200Hz signal to DC.

I noticed it that once I connect the 24V square wave signal to the circuit the signal gets an offset.

Here is what it looks like at the circuit input side: 75%duty cycle 0%duty cycle 50% duty cycle

The offset depends on the duty cycle, higher dutycycle means higher offset. To be clear, I'm not talking about the output from the opamp, but the input that gets altered.

One strange thing I noticed that once I measure the input when the OpAmps aren't powered I get a nice clean square wave input. So this means somehow the square wave gets tampered at the input once the OpAmps is powered.

Clean 75% square wave with OpAmps without power.

Needless to say the output of the OpAmps is incorrect. How come I get this offset?

Here is a simulation of what the outputs are supposed to be.

Driving circuit added from comments: REMOVED

• What offset? You've said virtually nothing about it and shown no oscilloscope pictures nor detailed the output circuit of the thing that generates the 24 volts. Put yourself in the position of a person reading this post. Nov 30, 2023 at 12:15
• What is driving the 24V square wave into your circuit? What is its output impedance? You might need a buffer on the input. Nov 30, 2023 at 12:34
• The problem is with your output circuit producing the 24 volts. Try adding it to your micro-cap simulation circuit and you'll see why. Nov 30, 2023 at 13:43
• @Simon Hmm. What came to my mind here was that I'd want the voltage to change every cycle, not tens or hundreds of milliseconds later. So something very much like (but admittedly simpler) this is what came to mind. (First google item given my search params, in fact.) Apparently, someone else also considered current sources and integration as the means. Probably over-kill here. Nov 30, 2023 at 23:10
• @Andyaka I added more information of what I observe. There are pictures of "offsets" now. Dec 7, 2023 at 14:40

## 2 Answers

If the PWM circuit has an asymmetrical output impedance that is significant with respect to the 12kΩ resistor then you'll get an 'offset'.

For example, if the PWM cicuit is a BJT with a pullup resistor to +24. (note: you've added the schematic link in a comment and it's the complement of that, so this comment applies to your situation).

Note also that you'll need a supply voltage of greater than 24V for this circuit to work accurately with duty cycles approaching 100%.

The circuit you have (linked in a comment) can be divided down to a lower voltage and that voltage can be buffered with another op-amp, all powered from +24V.

You'll get significant ripple with this circuit, which can be reduced by increasing time constants (at the expense of settling time).

Eg.

Compare with a buffer and longer time constants:

• "If the PWM circuit has an asymmetrical output impedance that is significant with respect to the 12kΩ resistor then you'll get an 'offset'." So you're saying if both the output impedance and input impedance are equal: eg. 10kOhm I wouldn't get the offset? (added screenshots to first post). Dec 7, 2023 at 15:01
• I am saying that if the source impedance when 'high' equals the source impedance when 'low' you won't get offset as a result of loading the output of the driving circuit with an RC network. Dec 7, 2023 at 15:22
• Now I think I understand your and ElectronicStudent's posts. Thank you, I'll report back with results somewhere within a week. Dec 7, 2023 at 15:22

I would use a different approach to yours.

(1) Input buffering

The leave the input signal unaffected by the conversion circuits, I would first buffer the input with a Z-inverter. This circuit has a high input impedance and a low output impedance.

Furthermore, I'd add input protection in case of TVS events (24V sounds a lot like industrial application, so a big must.) The resistor limits current in case of a TVS event and the diode protects the op-amp. Make sure to use a diode with low capacitance, as the resistor and the diodes parasitic capacitance form a RC-filter.

simulate this circuit – Schematic created using CircuitLab

(2) Filtering:

I would filter the signal by cascading multiple stages of 2nd order active low-pass filters with a Fcutoff of 50Hz.

The circuit shown requires around 40ms to generate a stable signal after the PWM value changes.

It can be build with a single quad op-amp IC and some passives.

The output is low impedance and can directly drive a PLC/ADC input but should not be connected to it with long cable runs.

(3) Signal levels:

• For a 24V/0% PWM this produces 0V DC
• For a 24V/20% PWM this produces 5.3V DC
• For a 24V/50% PWM this produces 13.2V DC
• For a 24V/80% PWM this produces 19.7V DC
• For a 24V/100% PWM this produces 24V DC

This gives you a near linear response.

NOTE: The non-linearity is mainly based on "not so precise readings" on my side.