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I'm trying to design a circuit that will allow me to set and reset an SR-latch with a single input.

My idea is that when the input is driven high, the latch immediately resets, and if it persists for longer than t milliseconds then it is set.

So when I want to reset I supply the input with duration less than t and when I want to set - greater than t.

schematic

simulate this circuit – Schematic created using CircuitLab

I tried simulating it in falstad - check it out

It seems to work, when the input is held for around 10 ms the latch is set, but when released I notice a voltage drop below 0 on R:

enter image description here

This makes me a little uncomfortable because I don't fully understand what is happening. I understand that negative voltage means that ground is at higher potential than R, but that just raises so many questions in my mind...

  1. Is charge taken from ground through R3 to bring R to 0V?
  2. How does it work?
  3. Is it going to cause damage to a battery?
  4. Can it disrupt the reference voltage of a buck converter if that's the power source?
  5. Could it cause damage to the latch as it will also see negative voltage on it's R input?
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  • \$\begingroup\$ For 5, are you using the schematic above for the SR latch or are you using a commercial SR IC? \$\endgroup\$
    – winny
    Commented Nov 30, 2023 at 14:13
  • \$\begingroup\$ @winny I'm using CD4044 \$\endgroup\$
    – php_nub_qq
    Commented Nov 30, 2023 at 14:13
  • \$\begingroup\$ Which IC it is? Some have protection diodes, but they are not meant to be relied upon in a design, it is not good practice. \$\endgroup\$
    – Justme
    Commented Nov 30, 2023 at 14:14
  • \$\begingroup\$ What does the datasheet say about acceptable input voltage range? \$\endgroup\$
    – winny
    Commented Nov 30, 2023 at 14:15
  • \$\begingroup\$ @winny -0.5 to vcc, so I'm guessing that's a no-go, back to the drawing board... OR, I could put a diode that's forward biased towards the IC's input pin, that would prevent it from sourcing current, but it will still see the negative voltage, not sure if that would save it... \$\endgroup\$
    – php_nub_qq
    Commented Nov 30, 2023 at 14:18

1 Answer 1

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If this exactly happens with a real circuit, too (not just simulation), it means the "NOT gate" does not have a clamping diode in the input. It's very common for a gate to have this in the input (source):

Micro input

If the chip has these diodes, the voltage of the signal will be clamped to the diode voltage.

It's not a good idea to let this happen. It's better to add a diode with low Vf in your circuit so that diode would dissipate that energy from the capacitor. The connection is the same as the bottom diode in the picture (cathode to the input and anode to GND).

To answer your questions:

  1. The current will go through the bottom 1k resistor (R3 in the first schematic) from GND to discharge the capacitor.

  2. It's a high-pass RC filter characteristic.

UPDATE:

As explained by a comment, the question is how we can draw current from GND. The GND in your circuit is not a single node. It's connected to the chip, output load, etc. When this capacitor is drawing some current from GND, the return current to the battery will be reduced (for a very short period of time) as long as this current is not going to be bigger than the return current to the battery (It's not possible and the current drawn to the capacitor will be limited by that current); meaning the battery will source current from the negative node. Kirchhoff's law can explain what happens there. You need to create a complete network of the components to be able to see where the current goes. In very simple terms, when this capacitor is drawing current from the GND, the return current to the battery will be reduced (during capacitor discharging). Because the battery has only two terminals, by reducing the return current from GND, the source from positive will be reduced at the same time. This means, the stored energy in the capacitor from the previous charge (higher current drawn from the battery in the charging phase), is being discharged to supply rail if you have a diode there. In case of discharging through the resistor, the energy will be dissipated through the R3 resistor and you will see less ripple in the return current.

  1. No. It will create a small ripple in GND, though.

  2. Usually, the effect is negligible. Unless you decide to go for higher capacitors. In that case, the design and placement of the components are important. Usually, to prevent any noise from going back to the rest of the circuits, a T or Pi filter is used on supply lines.

  3. Yes. Add an external diode to prevent any potential damage.

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  • \$\begingroup\$ Ok I got the drop to -0.3V in the simulation now, I guess this will work! I still can't understand how we are taking charge from ground though. In the case of a battery, how does it recover? Does charge flow from positive to negative internally in the battery to balance it out? Essentially meaning that we are still decreasing the positive voltage of the battery by whatever small charge was taken out from ground? \$\endgroup\$
    – php_nub_qq
    Commented Nov 30, 2023 at 15:19
  • \$\begingroup\$ Ah, I see where the confusion is. I'll add some explanation to the answer. For -0.3v, it is usually acceptable by most ICs. You need to check the minimum acceptable voltage on the datasheet. If you already have the part number, add it to the question so we can help you with it. \$\endgroup\$
    – Saadat
    Commented Nov 30, 2023 at 15:33
  • \$\begingroup\$ Thank you for elaborating, I'm still having difficulty understanding but I'll read it a couple dozen more times and I'll get it eventually. In the mean time, here is the solution in simulation in case anyone is interested. I used a very small capacitance in order to minimize ground ripple. \$\endgroup\$
    – php_nub_qq
    Commented Nov 30, 2023 at 16:20

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