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I do not really understand how the soft start circuitry of the UC3845 is really working.

Here is what is explaining:

enter image description here

Here is the architecture of the chip:

enter image description here

I understand that we need a transistor as it is said for separating the "normal mode" from the "other modes" (like soft start mode"). Nevertheless, can a diode do the work?

Then there is a second line which explain why they used a transistor and not a diode (if a diode can work): "It also minimizes the loading effect on the RT/CT time constant by amplification through the transistors gain". I do not really understand how the pin comp can disturb the RT/CT? What I can suppose is that if Vcomp is drawing a large current, it can make Vref goes down?

enter image description here

Thank you,

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  • \$\begingroup\$ Vref is used as "output" to indicate that the CI is working under UVLO mode. The Rss/Css/BJT is only used at starting from 0 V then it disconnects itself and does not load anymore the Vref and COMP pins which are used later as "linear" control. Note also that the schematic is not complete as a current generator (0.5 mA, fig 8.4) is used at the output of the E/A amplifier. \$\endgroup\$
    – Antonio51
    Dec 4, 2023 at 9:46
  • \$\begingroup\$ Thank you for your comment, Why do they use a transistor and not a diode ? \$\endgroup\$
    – Jess
    Dec 4, 2023 at 9:52
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    \$\begingroup\$ It's simply a typo; they should've said Rss/Css. \$\endgroup\$ Dec 4, 2023 at 16:05
  • \$\begingroup\$ Well, it will make sense ! \$\endgroup\$
    – Jess
    Dec 4, 2023 at 16:37

3 Answers 3

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A transistor is better than a diode for longer soft-start duration.

Consider the values in @Verbal Kint's answer:

enter image description here

I(CMP) (sourcing) is 0.5mA min, 0.8 typical, with no maximum given (presumably variation is due to diffusion resistance or hFE, and the maximum isn't much higher than this; but, we can't know this from the datasheet!). To get a ΔV/Δt of say 5V/10ms, you need at least C = (0.5mA)(10ms) / (5V) = 1μF, with R14 infinite; but this will be subject to gross error because we don't know I(CMP) for sure. The next step we can take, is to "swamp" the effect of I(CMP) variation, by sourcing additional bias current through R14 and using as many times larger C9. Now we get a (1.5kΩ)(4.7μF) = 7ms time constant, relatively free of loading from CMP (i.e. it might vary 4-6ms depending on I(CMP), an acceptable range).

But we hit a wall either for device ratings, or practical reasons, as I(VREF) (sourcing) is limited to 20mA total, and we probably want a lot less than that to ensure orderly startup conditions (i.e. avoid drawing down the start-up capacitor by charging this one; notice that 4.7μF is a sizable fraction of a typical VCC capacitor, say 47, 100 μF, thereabouts). That is, we're drawing some mA (or more, depending on how well "swamped" we want it to be) throughout the startup phase, at exactly the time when VCC is at a premium.[1]

If we use a transistor, I(CMP) is effectively reduced by hFE times as seen at the VSS node, allowing us to use a much higher impedance network -- say 10s or 100s of nF, and 10-47k.

I think there may also be some confusion (on part of the datasheet authors/editors) with the recommended slope compensation circuit, which similarly loads the Rt/Ct network, and therefore an emitter follower is desirable (Fig. 8-11). Perhaps this is the origin of the "Rt/Ct" mislabeling. (Alternately, "timing resistor" "timing capacitor" might be meant more generally here; but considering they label the components right there, in the figure, it would be much clearer if they used them as such.)

TI documentation quality is pretty cromulent[2] these days, so, it is good to read it with an open mind, cross reference things a bit, and to figure out whether they've made a mistake, or really mean what they seem to say. It is unfortunate it isn't clearer, but it is what it is.

[1] Since UC3845 is given here, this is likely less important; but it's important to consider in general across the family, and there may still be applications where a -5 would care. Namely, when VCC is charged through a start-up circuit, then the controller kicks on (above UVLO) and is supplied only through its capacitor, until auxiliary self-power is available (after startup). This is more often the case for the UC3842 and -4 (with a wide UVLO range to give more startup time), and won't matter when an external VCC supply is provided (the usual use-case for -3, -5).

[2] Mediocre but adequate; I mean it more in the slightly-negative connotation here (emphasis on mediocrity, often not quite adequate enough).

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  • \$\begingroup\$ Hello, the circuit I proposed is not from me, it is an industry standard and I've seen it many times implemented in volume production from big players. Regarding the compensation, resorting to a buffered oscillator ramp is a wrong way of doing things in my opinion, copied from the original Unitrode data-sheet and duplicated over the years. Considering the few µA in the oscillator, you don't want to disturb it by adding any circuitry around it. Cheers! Chris \$\endgroup\$ Dec 4, 2023 at 22:08
  • \$\begingroup\$ Copied from you answer, to be clear. \$\endgroup\$ Dec 5, 2023 at 0:20
  • \$\begingroup\$ I actually never realized that onsemi was proposing both options in their data-sheet in Fig. 25 and 26. ST does the same according to this SE answer. \$\endgroup\$ Dec 5, 2023 at 6:31
  • \$\begingroup\$ Hah, and with no discussion about either one, go figure. (They show the emitter follower slope compensation as well.) \$\endgroup\$ Dec 5, 2023 at 8:16
  • \$\begingroup\$ I remember referring to the other method for slope compensation in a previous answer I gave on SE. The \$RCD\$ network is much more robust than the emitter follower on the oscillator pin. \$\endgroup\$ Dec 5, 2023 at 9:13
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Most of the industrial designs I have seen with a soft-start implemented around the UC384x were made the following way:

enter image description here

At power up, the capacitor is discharged and pulls the CMP pin low, minimizing the peak current setpoint. As the capacitor charges via the 1.5-k resistance, it lifts the CMP pin and gradually allows more peak current. At some point, the voltage of the capacitor exceeds the op-amp operating point and continues to rise until it is clamped by the reference voltage as \$D_2\$ blocks. At power off, diode \$D_1\$ discharges the capacitor for another fresh start-up sequence.

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  • \$\begingroup\$ Thank you for your answer. Do you mean that the transistor can be replaced by a diode ? By supposing that the effect of the current injected into the capacitor by the EA amplifier will be negligeable on the soft start timing? \$\endgroup\$
    – Jess
    Dec 4, 2023 at 16:35
  • \$\begingroup\$ Need two diodes, one for pulling CMP low and the second one to clamp and discharge at power off. \$\endgroup\$ Dec 4, 2023 at 16:46
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Nevertheless, can a diode do the work?

In order to implement the soft start, comp needs to be forced low and allowed to rise gently. The output of the error amplifier can push/pull by as much as 0.5mA. This means a simple RC divider with a diode wouldn't work very well and would have to be strong in order to ignore the output of the error amplifier, which might not be constant during a soft start.
A diode would probably isolate the RC softstart from the circuit once charged during normal operation, but the transistor provides significant current gain which makes it better suited for forcing the comp voltage to a desired level, and better isolates the charging of the RC circuit during soft start.

I do not really understand how the pin comp can disturb the RT/CT?

I'm not sure I do either. I could speculate on possible reasons, but it's important to understand that the diagram in Figure 8-2 is not a comprehensive drawing of the internal chip architecture, but a block diagram explaining its function. We don't have a comprehensive idea of how the device works internally. It's entirely possible that there's a resistive, or semiconductive path between COMP and the RT/CT pin. In this case we don't get to understand why, we just have to operate the device as per the datasheet.

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  • \$\begingroup\$ Thank you for your answer.By saying:"But the transistor provides significant current gain which makes it better suited for forcing the comp voltage to a desired level, and better isolates the charging of the RC circuit during soft start."I do not understand what the gain do as the base is on the capacitor voltage, so there is no gain between the output voltage of the COMP the capacitor voltage" Do I really understand what you mean ? I agree with you on the fact that the 0.5 mA of the amplifier could modify the rising time of the soft start if a large resistor is used for making the soft start \$\endgroup\$
    – Jess
    Dec 4, 2023 at 12:46
  • \$\begingroup\$ The transistor provides current gain, not voltage gain. The voltage on the COMP pin should track the capacitor voltage, but the current flowing into the capacitor is much less than the current flowing through the transistor. \$\endgroup\$
    – LordTeddy
    Dec 4, 2023 at 13:51
  • \$\begingroup\$ I agree with you. The current passing through the capacitor is the gain divided by the beta of the current of the comp. So if there is only 0.5 mA at the output of EA amplifier and suppose there is 100 of beta on the transistor, the current "coming from" the COMP pin and going through the capacitor is 5uA. I mean the transistor provides no gain current for the EA amplifier ? \$\endgroup\$
    – Jess
    Dec 4, 2023 at 14:18
  • \$\begingroup\$ Yes, the transistor provides gain not for the error amplifier, but for the RC circuit. \$\endgroup\$
    – LordTeddy
    Dec 4, 2023 at 23:23

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