See page 54 in the oc datasheet There is one item in the list that the example code shown by the OP doesn't match, although that may not be the issue. #3 Write the OxCR register with the initial duty cycle.
Personally I do not care for macro usage because it is too generic and difficult to double check in code, as above, and sometimes the macros have bugs. If you are using MplabX, right click the macro and navigate-go to declaration to review the implementation.
Page 65 has a complete example except for a main subroutine, it could be copied and pasted quite easily.
Pic32 chips (and others in the MC family) don't hand hold very well. All it takes is one bit wrong somewhere and stuff just won't work. Every detail matters. Go through each one step by step and it will work. Also, I don't have enough reputation to comment, but could @RocketMagnet go into more detail about how he is checking the OC1 pin?
Also, 0xFFFF / 0x4000 = 33% duty cycle.
Added code --
#define SYSTEM_FREQ_HZ 80000000
#pragma config FPLLODIV = DIV_1, FSOSCEN = OFF, FPLLMUL = MUL_20, FPLLIDIV = DIV_2, FWDTEN = OFF, FPBDIV = DIV_1, POSCMOD = XT, FNOSC = PRIPLL, CP = OFF
#pragma config FMIIEN = ON, FETHIO = OFF, FUSBIDIO = OFF, FVBUSONIO = OFF // external PHY in RMII/alternate configuration
#pragma config UPLLEN = ON,UPLLIDIV = DIV_2
SYSTEMConfig(SYSTEM_FREQ_HZ, SYS_CFG_WAIT_STATES | SYS_CFG_PCACHE);
OpenOC1( OC_ON | OC_TIMER2_SRC | OC_PWM_FAULT_PIN_DISABLE, 0, 0);
OpenTimer2( T2_ON | T2_PS_1_1 | T2_SOURCE_INT, 0xFFFF);
unsigned short a;