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I have seen various approaches to the half-circuit analysis of perfectly-balanced differential amplifiers (see a particular example of a differential circuit at end if desired, but note that this question is ideally about all differential circuits) and am therefore trying to consolidate those. In particular, I am looking for a proof that the following "algorithm" (adapted from the later slides seen here) for small-signal analysis is valid. I have put a number (n) after every sentence about which I am not sure. If a proof of each claim (n) (or a reference from a book -- even Gray and Hurst does not seem to prove this) could be supplied then that would be greatly appreciated.

After forming the small-signal equivalent circuit of the overall balanced differential circuit, we first argue that the output differential voltage \$v_{od}\$ can be found by superposition due to the inputs \$v_{id}\$ and \$v_{ic}\$. Because the circuit is balanced, we also note that there are corresponding nodes on "each side" of the circuit. Thus we will refer to corresponding nodes via notation like \$v_{xa}\$ and \$v_{xb}\$, where the second subscript denotes the "side" of the circuit.

We consider \$v_{id}\$ first. Since applying \$v_{id}\$ can be seen to be equivalent to applying \$v_{id}/2\$ to Ma and \$-v_{id}/2\$ to Mb (these are called M1 and M2 in the image below), it follows from this antisymmetry that \$v_{xa}=-v_{xb}\$ for all \$x\$ (1). In particular, any common node (so that also \$v_{xa}=v_{xb}\$) must be a small-signal ground. Since the tail node is always common this means the tail node is a ground. Thus we can reduce the circuit to a differential half-circuit if the tail node is the only connection between the two sides of the circuit; if it is not the only such connection (suppose there are other "bridges" between the two sides) then we should take said bridges and create equivalent branches to ground (so that the circuit equations are unchanged) and so that, again, the two sides are decoupled. We again obtain a half-circuit to analyze.

We consider \$v_{ic}\$ next. Since applying \$v_{ic}\$ can be seen to be equivalent to applying \$v_{ic}\$ to Ma and \$v_{ic}\$ to Mb, it follows from this symmetry that \$v_{xa}=v_{xb}\$ for all \$x\$ (2). In particular, we can short common nodes \$xa,xb\$. This leads to the common-mode half circuit because we can now just look at one side, say a, because all internal nodes on the different sides are shorted.

enter image description here

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  • \$\begingroup\$ What did you understand from the slide show PDF you provided? I'd like to see your thinking. \$\endgroup\$ Dec 12, 2023 at 2:28
  • \$\begingroup\$ @periblepsis Sorry I missed this! At any rate, my understanding is that we are essentially using symmetry arguments about the inputs to a two-port network (either even, \$v_1 = v_2\$, or odd, \$v_1 = -v_2\$) to make claims based on symmetry about the voltages which must exist at certain interior nodes. In many ways I guess I am asking about network theory here. \$\endgroup\$
    – EE18
    Jan 29 at 21:50
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    \$\begingroup\$ Why would you want to worry about symmetry, it is impossible to build a circuit that is perfectly symmetrical. \$\endgroup\$
    – Voltage Spike
    Jan 30 at 16:37
  • \$\begingroup\$ Because, at least as far as the treatments I've seen go, the true, unbalanced case is analyzed by applying offsets to an "equivalent" balanced circuit (see e.g. this electronics.stackexchange.com/questions/691129/… question of mine). Thus understanding the balanced, ideal case is highly relevant. @VoltageSpike \$\endgroup\$
    – EE18
    Jan 30 at 22:26

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I am not aware of any "proof" although I suppose one could choose a circuit, write equations relating output voltage to the input voltages, and perform some sort of matrix decomposition.

I find the invocation of symmetry and superposition reasonable. And I suppose one might be led to this idea after analyzing a bunch of different symmetric circuits the hard way. In the same way that one might be led to phasor analysis after solving a bunch of circuits using differential equations.

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A lot of claims in the linked PDF are about symmetry and addition/subtraction.

This is mathematical stuff that is mostly based on axioms, which can not be proved but serve as basic building logic blocks for mathematical theories.

E.g. (I think) you can not prove that two points in space have a line as shortest connection.

What I‘ saying is that you might be better served with an answer in a math forum!?

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  • \$\begingroup\$ In many ways you are probably right but, that being said, I have in the past asked some network theory questions (surely in the domain of EE!) on this site and have been grateful to get answers from various people. I was hoping that might be possible once again :) \$\endgroup\$
    – EE18
    Feb 4 at 22:06
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The slide deck in the link has a clear explanation of transforming two voltages into a combination of common-mode and differential-mode signals. I think your question is why that transformation at the inputs also applies for all nodes in a symmetrical circuit.

The answer is linearity. In the case of a differential amplifier, the generally non-linear transistors are linearized around their operating point. That means this analysis does not apply when the magnitude of the signals is large enough to make the linear approximation fall apart. This doesn't really prevent the use of this analysis, one just has to be aware of distortion and apply various anti-distortion techniques (e.g. negative feedback, loads with an inverse non-linearity) if that is needed.

Consider the differential signal with no common-mode signal first. As voltages are continuous and the differential component is anti-symmetric, we know there is a point halfway between the inputs that is at 0 V. Between that point and each input is half of a symmetrical circuit. The two halves are identical, except that the sign of the voltage applied at the input is different. Applying the scaling property of linear networks, we can simply scale the node voltages by -1 to get the node voltages in the other half.

A similar argument can be made for a purely common-mode input. The difference is that both inputs have the same sign and the mid-point may not be at 0 V, but that does not change much.

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